74HC02 datasheet(2/5 Pages) PHILIPS

2 / 5 page

December 1990

Philips Semiconductors

Product speciﬁcation

Quad 2-input NOR gate

74HC/HCT02

FEATURES

• Output capability: standard

• ICC category: SSI

GENERAL DESCRIPTION

The 74HC/HCT02 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard no. 7A.

The 74HC/HCT02 provide the 2-input NOR function.

QUICK REFERENCE DATA

GND = 0 V; Tamb =25 °C; tr =tf = 6 ns

Notes

1. CPD is used to determine the dynamic power dissipation (PD in µW):

PD =CPD × VCC2 × fi + ∑ (CL × VCC2 × fO) where:

fi = input frequency in MHz

fo = output frequency in MHz

CL = output load capacitance in pF

VCC = supply voltage in V

∑ (CL × VCC2 × fo) = sum of outputs

2. For HC the condition is VI = GND to VCC

For HCT the condition is VI = GND to VCC − 1.5 V

ORDERING INFORMATION

See

“74HC/HCT/HCU/HCMOS Logic Package Information”.

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

HCT

tPHL/ tPLH

propagation delay nA, nB to nY

CL = 15 pF; VCC =5V

input capacitance

3.5

CPD

power dissipation capacitance per gate notes 1 and 2

74HC02 数据表(PDF) 2 Page - NXP Semiconductors

74HC02 数据表(HTML) 2 Page - NXP Semiconductors

Html Pages

1 2 3 4 5

数据表下载