Number

Name Function

Type

15

LOAD3 Power stage, channel 3

Input

16

LOAD2 Power stage, channel 2

Input

17

LOAD1 Power stage, channel 1

Input

2.1

VCC

IC supply voltage. This pin has to be connected to the supply rail of the application.

2.2

PGND, SGND

PGND stands for power ground and it is internally connected to the source of the integrated switches. SGND

stands for signal ground and it is the reference level for the logic interface. SGND and PGND pins must be

shorted on the application board. In order to reduce as much as possible the switching noises from PGND to

SGND, the application board has to be designed with two different ground planes for SGND and PGND. The two

ground planes have to be shorted by a dedicated net.

2.3

VZ

These two pins (corresponding to the cathodes of the clamp diodes) must be shorted together on the application

and connected directly to supply rail or, alternatively, connected by a Zener or TVS diode to supply rail or PGND.

Connecting VZ pins directly to the supply rail implies that the inductive loads are demagnetized without fast decay

option: in fact the VLOADx (voltage on LOADx pin) is forced to the forward voltage of the integrated clamp diodes.

The connection by a Zener or TVS allows to drive loads requiring fast current decay (fast demagnetization). For

the proper selection of the external Zener or TVS, please refer to Section 7.1 Fast current decay with TVS

between VZ and supply rail and Section 7.2 Fast current decay with TVS between VZ and PGND

Note:

Leaving VZ pins floating, the integrated output voltage clamp is activated and the fast current decay capability is

limited by the heatsink capability of the IC. See EAS in Table 2. Absolute maximum ratings.

2.4

IN1, IN2, IN3, IN4

These pins drive the power stage on pins LOAD1, LOAD2, LOAD3 and LOAD4. Besides an internal weak

pull-down resistor (see Iinx in Table 7. Logic inputs), each IN1, IN2, IN3, IN4, is internally wired to an

open drain transistor, used for diagnostic purposes, and must be driven through a series resistor. The open

drain transistor is turned-on in case of thermal shutdown or cut-off protection of the relative channel (see

Section 6.2 Overtemperature and Section 6.3 Current limitation and cut-off ).

2.5

LOAD1, LOAD2, LOAD3, LOAD4

Power stage load connection pins: integrated power transistor are in low-side configuration, so the load has to be

connected between LOADx pin and supply rail. The power stage channels can be paralleled.

2.6

Open load in off-state

OL pin is used for diagnostic purpose and it is internally wired to an open drain transistor. If the open load feature

is enabled (see Section 6.4 Open load in off-state) the open drain transistor is activated when LOADx is in off

state and the open load threshold (VOLoff) is triggered (see Table 8. Protection and diagnostic ).

2.7

FLT

This pin is used for diagnostic purpose and it is internally wired to an open drain transistor. The open drain

transistor is turned on in case of junction thermal shutdown or during the cut-off protection.

IPS4260L

VCC

DS12305 - Rev 5

page 5/29