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MAX9750CEUI 数据表(PDF) 21 Page - Maxim Integrated Products |
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MAX9750CEUI 数据表(HTML) 21 Page - Maxim Integrated Products |
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21 / 30 page ![]() 2.6W Stereo Audio Power Amplifiers and DirectDrive Headphone Amplifiers ______________________________________________________________________________________ 21 Output Capacitor (C2) The output capacitor value and ESR directly affect the ripple at CPVSS. Increasing the value of C2 reduces output ripple. Likewise, decreasing the ESR of C2 reduces both ripple and output resistance. Lower capacitance values can be used in systems with low maximum output power levels. See the Output Power vs. Charge-Pump Capacitance and Load Resistance graph in the Typical Operating Characteristics. CPVDD Bypass Capacitor The CPVDD bypass capacitor (C3) lowers the output impedance of the power supply and reduces the impact of the MAX9750/MAX9751/MAX9755’s charge- pump switching transients. Bypass CPVDD with C3, the same value as C1, and place it physically close to CPVDD and PGND (refer to the MAX9750 Evaluation Kit for a suggested layout). Powering Other Circuits from a Negative Supply An additional benefit of the MAX9750/MAX9751/ MAX9755 is the internally generated negative supply voltage (CPVSS). CPVSS is used by the MAX9750/ MAX9751/MAX9755 to provide the negative supply for the headphone amplifiers. It can also be used to power other devices within a design. Current draw from CPVSS should be limited to 5mA, exceeding this affects the operation of the headphone amplifier. A typical application is a negative supply to adjust the contrast of LCD modules. When considering the use of CPVSS in this manner, note that the charge-pump voltage of CPVSS is roughly proportional to CPVDD and is not a regulated voltage. The charge-pump output impedance plot appears in the Typical Operating Characteristics. Layout and Grounding Proper layout and grounding are essential for optimum performance. Use large traces for the power-supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance, as well as route head away from the device. Good grounding improves audio per- formance, minimizes crosstalk between channels, and prevents any switching noise from coupling into the audio signal. Connect CPGND, PGND and GND together at a single point on the PC board. Route CPGND and all traces that carry switching transients away from GND, PGND, and the traces and compo- nents in the audio signal path. Connect all components associated with the charge pump (C2 and C3) to the CPGND plane. Connect VSS and CPVSS together at the device. Place the charge- pump capacitors (C1, C2, and C3) as close to the device as possible. Bypass HPVDD and PVDD with a 0.1µF capacitor to GND. Place the bypass capacitors as close to the device as possible. Use large, low-resistance output traces. As load imped- ance decreases, the current drawn from the device out- puts increase. At higher current, the resistance of the output traces decrease the power delivered to the load. For example, when compared to a 0 Ω trace, a 100mΩ trace reduces the power delivered to a 4 Ω load from 2.1W to 2W. Large output, supply, and GND traces also improve the power dissipation of the device. The MAX9750/MAX9751/MAX9755 thin QFN and TSSOP-EP packages feature exposed thermal pads on their undersides. This pad lowers the package’s ther- mal resistance by providing a direct heat conduction path from the die to the printed circuit board. Connect the exposed thermal pad to GND by using a large pad and multiple vias to the GND plane. MAX9750 INR INL 1 µF 1 µF 22nF OUTL+ OUTL- OUTR+ OUTR- OUT- OUT+ 22 µF 22 µF 10nF 20k Ω 20k Ω IN 10k Ω 10k Ω MAX9711 Figure 11. Stereo Plus Subwoofer Application Circuit |
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