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LT8646SEVPBF 数据表(PDF) 12 Page - Analog Devices |
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LT8646SEVPBF 数据表(HTML) 12 Page - Analog Devices |
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12 / 30 page ![]() LT8645S/LT8646S 12 Rev. B For more information www.analog.com PIN FUNCTIONS BIAS (Pin 1): The internal regulator will draw current from BIAS instead of VIN when BIAS is tied to a voltage higher than 3.1V. For output voltages of 3.3V to 25V this pin should be tied to VOUT. If this pin is tied to a supply other than VOUT use a 1µF local bypass capacitor on this pin. If no supply is available, tie to GND. However, especially for high input or high frequency applications, BIAS should be tied to output or an external supply of 3.3V or above. INTVCC (Pin 2): Internal 3.4V Regulator Bypass Pin. The internal power drivers and control circuits are powered from this voltage. INTVCC maximum output current is 25mA. Do not load the INTVCC pin with external circuitry. INTVCC current will be supplied from BIAS if BIAS > 3.1V, otherwisecurrentwillbedrawnfromVIN.VoltageonINTVCC will vary between 2.8V and 3.4V when BIAS is between 3.0V and 3.6V. This pin should be floated. NC (Pins 3, 7, 20, 24): No Connect. This pin is not con- nected to internal circuitry and can be tied anywhere on the PCB, typically ground. VIN (Pins 4, 5, 6, 21, 22, 23): The VIN pins supply cur- rent to the LT8645S/LT8646S internal circuitry and to the internal topside power switch. These pins must be tied together and be locally bypassed with a capacitor of 4.7µF or more. Be sure to place the positive terminal of the input capacitor as close as possible to the VIN pins, and the negative capacitor terminal as close as possible to the GND pins. See the Applications Information section for a sample layout. GND (Pins 8, 9, 10, 17, 18, 19, Exposed Pad Pins 33–38): Ground. Place the negative terminal of the input capacitor as close to the GND pins as possible. See the Applications Information section for a sample layout. The exposed pads should be soldered to the PCB for good thermal performance. If necessary due to manufacturing limitationsPins33to38maybeleftdisconnected,however thermal performance will be degraded. BST (Pin 11): This pin is used to provide a drive voltage, higher than the input voltage, to the topside power switch. This pin should be floated. SW (Pins 12, 13, 14, 15, 16): The SW pins are the outputs of the internal power switches. Tie these pins together and connectthemtotheinductorandboostcapacitor.Thisnode should be kept small on the PCB for good performance and low EMI. EN/UV (Pin 25): The LT8645S/LT8646S is shut down when this pin is low and active when this pin is high. The hysteretic threshold voltage is 1.01V going up and 0.965V going down. Tie to VIN if the shutdown feature is not used. An external resistor divider from VIN can be used to program a VIN threshold below which the LT8645S/ LT8646S will shut down. RT (Pin 26): A resistor is tied between RT and ground to set the switching frequency. CLKOUT (Pin 27): In pulse-skipping mode, spread spec- trum, and synchronization modes, the CLKOUT pin will provide a ~200ns wide pulse at the switch frequency. The low and high levels of the CLKOUT pin are ground and INTVCC respectively, and the drive strength of the CLKOUT pin is several hundred ohms. In Burst Mode operation, the CLKOUT pin will be low. Float this pin if the CLKOUT function is not used. SYNC/MODE (Pin 28): This pin programs four different operating modes: 1) Burst Mode. Tie this pin to ground for Burst Mode operation at low output loads—this will result in ultralow quiescent current. 2) Pulse-skipping mode. This mode offers full frequency operation down to low output loads before pulse skipping occurs. Float this pin for pulse-skipping mode. When floating, pin leakage currents should be <1µA. 3) Spread spectrum mode. Tie this pin high to INTVCC (~3.4V) or an external supply of 3V to 4V for pulse-skipping mode with spread spectrum modulation. 4) Synchronization mode. Drive this pin with a clock source to synchronize to an external frequency. During synchronization the part will operate in pulse- skipping mode. |
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