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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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HC08KL8GRS/D 数据表(PDF) 76 Page - NXP Semiconductors |
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HC08KL8GRS/D 数据表(HTML) 76 Page - NXP Semiconductors |
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76 / 256 page  Oscillator General Release Specification MC68HC08KL8 — Rev. 2.0 Oscillator 7.4.5 Oscillator Out (CGMOUT) The clock driven to the SIM is the crystal frequency divided by two. This signal is driven to the SIM for generation of the bus clocks used by the CPU and other modules on the MCU. CGMOUT will be divided again in the SIM and results in the internal bus frequency being one fourth of the CGMXCLK frequency. 7.5 Low-Power Modes The WAIT and STOP instructions put the MCU in low-power standby modes. 7.5.1 Wait Mode The WAIT instruction has no effect on the oscillator logic. CGMXCLK continues to drive to the SIM module. 7.5.2 Stop Mode The STOP instruction disables the CGMXCLK output. 7.6 Oscillator During Break Mode The oscillator continues to drive CGMXCLK when the chip enters the break state. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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