REV. E

–20–

REF19x Series

1 F

REF19x

GND

SLEEP

ADJUST

R1

P1

R1 = 953

P1 = 100 , 10-TURN

Figure 8. A Low Dropout, Precision Current Source

The circuit’s governing equations are:

= I

OUT

× R

+V

=

+ I

〉〉I

Switched Output 5 V/3.3 V Reference

Applications often require digital control of reference voltages,

selecting between one stable voltage and a second. With the

sleep feature inherent to the REF19x series, switched output

reference configurations are easily implemented with relatively

little additional hardware.

The circuit of Figure 9 illustrates the general technique, which

takes advantage of the output “wire-OR” capability of the REF19x

device family. When OFF, a REF19x device is effectively an

open circuit at the output node with respect to the power supply.

When ON, a REF19x device can source current up to its current

rating, but sink only a few

µA (essentially just the relatively low

current of the internal output scaling divider). As a result, for

two devices wired together at their common outputs, the output

voltage is simply that of the ON device. The OFF state device

will draw a small standby current of 15

µA (max), but otherwise

will not interfere with operation of the ON device, which can

operate to its full current rating. Note that the two devices in

the circuit conveniently share both input and output capacitors,

and with CMOS logic drive, it is power efficient.

U1

REF19x

(SEE TABLE)

C1

0.1 F

COMMON

COMMON

C2

1 F

U2

REF19x

(SEE TABLE)

3

4

1

2

U3B

74HC04

U3A

74HC04

OUTPUT TABLE

5.0

3.3

4.5

5.0

HI

LO

HI

LO

U1/U2

REF195/

REF196

REF194/

REF195

*CMOS LOGIC LEVELS

Figure 9. Switched Output Reference

Using dissimilar REF19x series devices with this configuration

allows logic selection between the U1/U2 specified terminal

voltages. For example, with U1 (a REF195) and U2 (a REF196),

control voltage from HI to LO selects between a nominal output

of 5.000 V and 3.300 V and vice versa. Other REF19x family

units can also be used for U1/U2, with similar operation in a

logic sense, but with outputs as per the individual paired devices

(see table, again). Of course, the exact output voltage tolerance,

drift, and overall quality of the reference voltage will be consistent

with the grade of individual U1 and U2 devices.

Because of the nature of the wire–OR, there is one application

caveat that should be understood about this circuit. Since U1

and U2 can only source current effectively, negative going output

voltage changes, which require the sinking of current, will neces-

sarily take longer than positive going changes. In practice, this

means that the circuit is quite fast when undergoing a transition

from 3.3 V to 5 V, but the transition from 5 V to 3.3 V will take

longer. Exactly how much longer will be a function of the load

µF value of

C2. In general, a conservative transition time here will be on the

order of several milliseconds for load resistances in the range of

100

Ω to 1 kΩ. Note that for highest accuracy at the new output

voltage, several time constants should be allowed (>7.6 time

constants for <1/2 LSB error @ 10 bits, for example).