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74LVC02A 数据表(PDF) 4 Page - NXP Semiconductors

部件名 74LVC02A
功能描述  Quad 2-input NOR gate
PDF  10 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

74LVC02A 数据表(HTML) 4 Page - NXP Semiconductors

  74LVC02A Datasheet HTML 1Page - NXP Semiconductors 74LVC02A Datasheet HTML 2Page - NXP Semiconductors 74LVC02A Datasheet HTML 3Page - NXP Semiconductors 74LVC02A Datasheet HTML 4Page - NXP Semiconductors 74LVC02A Datasheet HTML 5Page - NXP Semiconductors 74LVC02A Datasheet HTML 6Page - NXP Semiconductors 74LVC02A Datasheet HTML 7Page - NXP Semiconductors 74LVC02A Datasheet HTML 8Page - NXP Semiconductors 74LVC02A Datasheet HTML 9Page - NXP Semiconductors Next Button
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Philips Semiconductors
Product specification
74LVC02A
Quad 2-input NOR gate
1998 Apr 28
4
ABSOLUTE MAXIMUM RATINGS1
Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
VCC
DC supply voltage (for max. speed
performance)
–0.5 to +6.5
V
IIK
DC input diode current
VI t0
–50
mA
VI
DC input voltage
Note 2
–0.5 to +5.5
V
IOK
DC output diode current
VO uVCC or VO t 0
"50
mA
VO
DC output voltage
Note 2
–0.5 to VCC + 0.5
V
IO
DC output source or sink current
VO = 0 to VCC
"50
mA
IGND, ICC
DC VCC or GND current
"100
mA
Tstg
Storage temperature range
–65 to +150
°C
Power dissipation per package
PTOT
– plastic mini-pack (SO)
above +70
°C derate linearly with 8 mW/K
500
mW
– plastic shrink mini-pack (SSOP and TSSOP)
above +60
°C derate linearly with 5.5 mW/K
500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
°C to +85°C
UNIT
MIN
TYP1
MAX
V
HIGH level Input voltage
VCC = 1.2V
VCC
V
VIH
HIGH level Input voltage
VCC = 2.7 to 3.6V
2.0
V
V
LOW level Input voltage
VCC = 1.2V
GND
V
VIL
LOW level Input voltage
VCC = 2.7 to 3.6V
0.8
V
VCC = 2.7V; VI = VIH or VIL;IO = –12mA
VCC*0.5
VO
HIGH level output voltage
VCC = 3.0V; VI = VIH or VIL;IO = –100µA
VCC*0.2
VCC
V
VOH
HIGH level output voltage
VCC = 3.0V; VI = VIH or VIL; IO = –18mA
VCC*0.6
V
VCC = 3.0V; VI = VIH or VIL; IO = –24mA
VCC*0.8
VCC = 2.7V; VI = VIH or VIL;IO = 12mA
0.40
VOL
LOW level output voltage
VCC = 3.0V; VI = VIH or VIL;IO = 100µA
0.20
V
VCC = 3.0V; VI = VIH or VIL; IO = 24mA
0.55
I
Input leakage current
VCC =3 6V; V = 5 5V or GND
"01
"5
µA
II
Input leakage current
VCC = 3.6V; VI = 5.5V or GND
"0.1
"5
µA
ICC
Quiescent supply current
VCC = 3.6V; VI = VCC or GND; IO = 0
0.1
10
µA
∆ICC
Additional quiescent supply current
per input pin
VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0
5
500
µA
NOTES:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.



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