5/12

STV8162 - STV8162D

Circuit Description

3

Circuit Description

The STV8162 and STV8162D are triple-voltage regulators with Reset and Disable functions.

The three regulation parts are supplied from a single voltage reference circuit trimmed by zener

zapping during EWS testing. Since the supply voltage of this voltage reference is connected to pin

The output stages are designed using a Darlington configuration with a typical dropout voltage of

1.0 V.

IMPORTANT:

In all applications, all three inputs must be polarized. If Outputs 2 or 3 are not used, the

corresponding inputs must be connected to Input 1.

The Disable circuit will switch off pins OUTPUT2 and OUTPUT3 if a voltage less than 0.8 V is

applied to pin DISABLE.

(4.75 V Typ.), the "a" comparator (Figure 3) rapidly discharges the external capacitor (Ce) and the

reset output immediately switches to low. When the voltage at pin OUTPUT1 exceeds

Afterwards, the reset output returns to high. To avoid glitches in the reset output, the second

comparator "b" has a large hysteresis (1.9 V).

t

RD

C

e

2.5V

´

10

mA

--------------------------

=