93LC86CTESTG datasheet(10/28 Pages) MICROCHIP

10 / 28 page

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C

DS21797G-page 10

2.8

Write

The WRITE instruction is followed by 8 bits (If ORG is

low or A-version devices) or 16 bits (If ORG pin is high

or B-version devices) of data which are written into the

specified address. The self-timed auto-erase and

programming cycle is initiated by the rising edge of CLK

on the last data bit.

The DO pin indicates the Ready/Busy status of the

device, if CS is brought high after a minimum of 250 ns

low (TCSL). DO at logical ‘0’ indicates that programming

is still in progress. DO at logical ‘1’ indicates that the

the data specified and the device is ready for another

instruction.

FIGURE 2-6:

WRITE TIMING

Note:

The write sequence requires a logic high

signal on the PE pin prior to the rising

edge of the last data bit.

Note:

After the Write cycle is complete, issuing a

Start bit and then taking CS low will clear

the Ready/Busy status from DO

CLK

•••

Busy

Ready

High-Z

TWC

TCSL

TCZ

TSV

93LC86CTESTG 数据表(PDF) 10 Page - Microchip Technology

93LC86CTESTG 数据表(HTML) 10 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

数据表下载