M58LR128FT datasheet(13/82 Pages) STMICROELECTRONICS

13 / 82 page

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M58LR128FT, M58LR128FB

Status of the addressed bank, the Protection Reg-

ister, or the Configuration Register (see Table 7.).

The Read Electronic Signature command can be

issued at any time, even during program or erase

operations, except during Protection Register Pro-

gram operations.

If a Read Electronic Signature command is issued

to a bank that is executing a program or erase op-

eration the bank will go into Read Electronic Sig-

nature mode. Subsequent Bus Read cycles will

output the Electronic Signature data and the Pro-

gram/Erase controller will continue to program or

erase in the background.

The Read Electronic Signature command will only

change the read mode of the addressed bank. The

read modes of other banks are not affected. Only

Asynchronous Read and Single Synchronous

Read operations should be used to read the Elec-

tronic Signature. A Read Array command is re-

quired to return the bank to Read Array mode.

Read CFI Query Command

The Read CFI Query command is used to read

data from the Common Flash Interface (CFI).

One Bus Write cycle is required to issue the Read

CFI Query command. Once a bank is in Read CFI

Query mode, subsequent Bus Read operations in

the same bank read from the Common Flash Inter-

face.

The Read CFI Query command can be issued at

any time, even during program or erase opera-

tions.

If a Read CFI Query command is issued to a bank

that is executing a program or erase operation the

bank will go into Read CFI Query mode. Subse-

quent Bus Read cycles will output the CFI data

and the Program/Erase controller will continue to

program or erase in the background.

The Read CFI Query command will only change

the read mode of the addressed bank. The read

modes of other banks are not affected. Only Asyn-

chronous Read and Single Synchronous Read op-

erations should be used to read from the CFI. A

Read Array command is required to return the

bank to Read Array mode.

See APPENDIX B., COMMON FLASH INTER-

FACE, Tables 31, 32, 33, 34, 35, 37, 38, 39 and 40

for details on the information contained in the

Common Flash Interface memory area.

Clear Status Register Command

The Clear Status Register command can be used

to reset (set to ‘0’) all error bits (SR1, 3, 4 and 5) in

the Status Register.

One Bus Write cycle is required to issue the Clear

Status Register command. The Clear Status Reg-

ister command does not change the read mode of

the addressed bank.

The error bits in the Status Register do not auto-

matically return to ‘0’ when a new command is is-

sued. The error bits in the Status Register should

be cleared before attempting a new program or

erase command.

Block Erase Command

The Block Erase command is used to erase a

block. It sets all the bits within the selected block

to ’1’. All previous data in the block is lost.

If the block is protected then the erase operation

will abort, the data in the block will not be changed

and the Status Register will output the error.

Two Bus Write cycles are required to issue the

command.

■

The first bus cycle sets up the Block Erase

command.

■

The second latches the block address and

starts the Program/Erase Controller.

If the second bus cycle is not the Block Erase Con-

firm code, Status Register bits SR4 and SR5 are

set and the command is aborted.

Once the command is issued the bank enters

Read Status Register mode and any read opera-

tion within the addressed bank will output the con-

tents of the Status Register. A Read Array

command is required to return the bank to Read

Array mode.

During Block Erase operations the bank contain-

ing the block being erased will only accept the

Read Array, Read Status Register, Read Electron-

ic Signature, Read CFI Query and the Program/

Erase Suspend command, all other commands

will be ignored.

The Block Erase operation aborts if Reset, RP,

goes to VIL. As data integrity cannot be guaran-

teed when the Block Erase operation is aborted,

the block must be erased again.

Refer to Dual Operations section for detailed infor-

mation about simultaneous operations allowed in

banks not being erased.

Typical

Erase

times

are

given

Table

15., Program, Erase Times and Endurance Cy-

cles.

See APPENDIX C., Figure 25., Block Erase Flow-

chart and Pseudo Code, for a suggested flowchart

for using the Block Erase command.

Program Command

The program command is used to program a sin-

gle Word to the memory array.

Two Bus Write cycles are required to issue the

Program Command.

■

The first bus cycle sets up the Program

command.

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