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74LVC646AD 数据表(PDF) 3 Page - NXP Semiconductors |
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74LVC646AD 数据表(HTML) 3 Page - NXP Semiconductors |
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3 / 16 page ![]() Philips Semiconductors Product specification 74LVC646A Octal bus transceiver/register (3-State) 1998 Jul 29 3 PIN CONFIGURATION SV00766 1 2 3 4 5 6 7 8 9 10 11 12 CP AB S AB DIR A 0 A 1 A 2 A 3 A 4 A 5 A 6 A 7 GND V CC CP BA S BA OE B 0 B 1 B 2 B 3 B 4 B 5 B 6 B 7 24 23 22 21 20 19 18 17 16 15 14 13 PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 1 CPAB ‘A’ to ‘B’ clock input (LOW-to-HIGH, edge-triggered) 2 SAB Select ‘A’ to ‘B’ source input 3 DIR Direction control input 4, 5, 6, 7, 8, 9, 10, 11 A0 to A7 ‘A’ data inputs/outputs 12 GND Ground (0V) 20, 19, 18, 17, 16, 15, 14, 13 B0 to B7 ‘B’ data inputs/outputs 21 OE Output enable input (active LOW) 22 SBA Select ‘B’ to ‘A’ source input 23 CPBA ‘B’ to ‘A’ clock input (LOW-to-HIGH, edge-triggered) 24 VCC Positive supply voltage FUNCTION TABLE INPUTS DATA I/O * FUNCTION OE DIR CPAB CPBA SAB SBA A0 to A7 B0 to B7 FUNCTION X X X X ↑ X X ↑ X X X X input un * un * input store A, B unspecified * store B, A unspecified * H H X X ↑ H or L ↑ H or L X X X X input input store A and B data, isolation hold storage L L L L X X X H or L X X L H output input real-time B data to A bus stored B data to A bus L L H H X H or L X X L H X X input output real-time A data to B bus stored A data to B bus * The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled, i.e., data at the bus inputs will be stored on every LOW-to-HIGH transition on the clock inputs. un = unspecified H = HIGH voltage level L = LOW voltage level X = Don’t care ↑ = LOW-to-HIGH level transition |
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