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7LVC573APWDH 数据表(PDF) 7 Page - NXP Semiconductors

部件名 7LVC573APWDH
功能描述  Octal D-type transparent latch with 5-volt tolerant inputs/outputs 3-State
PDF  12 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

7LVC573APWDH 数据表(HTML) 7 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74LVC573A
Octal D-type transparent latch with 5-volt
tolerant inputs/outputs (3-State)
1998 Jul 29
7
AC WAVEFORMS
VM = 1.5V at VCC w 2.7V; VM = 0.5 VCC at VCC t 2.7V.
VOL and VOH are the typical output voltage drop that occur with the
output load.
VX = VOL + 0.3V at VCC w 2.7V; VX = VOL + 0.1 VCC at VCC t 2.7V
VY = VOH –0.3V at VCC w 2.7V; VY = VOH – 0.1 VCC at VCC t 2.7V
SY00041
INPUT
VM
tPHL
tPLH
VOL
VI
VM
GND
VOH
OUTPUT
Waveform 1. Input (Dn) to output (Qn) propagation delays.
tw
tPHL
tPLH
LE INPUT
Qn OUTPUT
VM
VM
SA00388
VI
GND
VOH
VOL
Waveform 2. Latch enable input (LE) pulse width, the latch
enable input to output (Qn) propagation delays
tPLZ
tPZL
VI
nOE INPUT
GND
VCC
Qn OUTPUT
LOW-to-OFF
OFF-to-LOW
VOL
VOH
Qn OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
outputs
enabled
outputs
disabled
tPHZ
VM
VM
VM
tPZH
VX
VY
SW00207
Waveform 3. 3-State enable and disable times.
VM
Dn
INPUT
VM
LE
INPUT
tSU
th
NOTE: The shaded areas indicate when the input is permitted to change
for predictable output performance.
SW00073
tSU
th
VI
GND
VI
GND
Waveform 4. Data setup and hold times for the Dn input to the
LE input.
TEST CIRCUIT
PULSE
GENERATOR
RT
VIN
D.U.T.
VOUT
CL
VCC
RL=500 Ω
SWITCH POSITION
TEST
SWITCH
tPLH/tPHL
Open
tPLZ/tPZL
2
<VCC
tPHZ/tPZH
GND
Test Circuit for 3-State Outputs
Open
GND
S1
2
<VCC
DEFINITIONS
VCC
t 2.7V
2.7 – 3.6V
VIN
VCC
2.7V
RL = Load resistor
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to ZOUT
of pulse generators.
SW00047
RL=500 Ω
Waveform 5. Load circuitry for switching times.



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