Functional Description

TSM007

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Functional Description

TSM007: PWM Controller IC

Internal UVLO function

The Under Voltage Lock Out function disables the

whole device when supply voltage is lower than

the threshold.

Vref block

The Vref block provides an internal 5V reference

voltage to the IC. An internal Vref status signal is

active when Vref is lower than 4.7V and is used to

drive the output driver low when Vref is not valid.

Startup latch

The startup latch is set when the IC exits from

standby mode or UVLO state. It is reset when the

CT capacitor is discharged for the first time.

Current sense input

A voltage proportional to the transformer primary

winding current is applied to the CS pin. The

control IC uses this information to perform current

mode control. The PWM function will be stopped if

the CS pin voltage is greater than 1.0V.

Oscillator

A capacitor from the CT pin to GND sets the

oscillating frequency.

T = Tc+Td

T = CT

∆Vct/Ici + CT∆Vct/Icd

Let’s assume F = 1/T =100KHz

==> CT = (IcixIcd) / (Fx

∆Vct(Ici+Icd))

==> CT = 1.5nF

Vref

1mA

400µA

CT

CT

Comp_osc

1.4V_3.0V

Out

Out

Vcc

UVLO

Vref

Vref_Status

R

S

Q

!Q

Startup Latch

Vref

1mA

400µA

CT

CT

Comp_osc

1.4V_3.0V

Out

Out

R

S

Q

!Q

Cs Latch

1V

Comp_Cs

Comp

CS

2R

R

VF

VF

725µA

Vin

VCT

Tc

Td

Ici=400µA

Vref

1mA

400µA

CT

CT

Ici

Vref

1mA

400µA

CT

CT

Icd

Icd=600µA

3V

1.4V