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STM8AF/P6348 数据表(PDF) 33 Page - STMicroelectronics |
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STM8AF/P6348 数据表(HTML) 33 Page - STMicroelectronics |
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33 / 95 page  DS12343 Rev 2 33/95 STM8AF6366 Memory and register map 93 7.2 Register map In this section the memory and register map of the devices covered by this datasheet is described. For a detailed description of the functionality of the registers, refer to STM8S series and STM8AF series 8-bit microcontrollers reference manual, RM0016. Table 9. Memory model for the devices covered in this datasheet Flash program memory size Flash program memory end address RAM size RAM end address Stack roll-over address 32K 0x00 0FFFF 2K 0x00 07FF 0x00 0600 16K 0x00 0BFFF Table 10. I/O port hardware register map Address Block Register label Register name Reset status 0x00 5000 Port A PA_ODR Port A data output latch register 0x00 0x00 5001 PA_IDR Port A input pin value register 0xXX(1) 0x00 5002 PA_DDR Port A data direction register 0x00 0x00 5003 PA_CR1 Port A control register 1 0x00 0x00 5004 PA_CR2 Port A control register 2 0x00 0x00 5005 Port B PB_ODR Port B data output latch register 0x00 0x00 5006 PB_IDR Port B input pin value register 0xXX(1) 0x00 5007 PB_DDR Port B data direction register 0x00 0x00 5008 PB_CR1 Port B control register 1 0x00 0x00 5009 PB_CR2 Port B control register 2 0x00 0x00 500A Port C PC_ODR Port C data output latch register 0x00 0x00 500B PB_IDR Port C input pin value register 0xXX(1) 0x00 500C PC_DDR Port C data direction register 0x00 0x00 500D PC_CR1 Port C control register 1 0x00 0x00 500E PC_CR2 Port C control register 2 0x00 0x00 500F Port D PD_ODR Port D data output latch register 0x00 0x00 5010 PD_IDR Port D input pin value register 0xXX(1) 0x00 5011 PD_DDR Port D data direction register 0x00 0x00 5012 PD_CR1 Port D control register 1 0x02 0x00 5013 PD_CR2 Port D control register 2 0x00 |
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