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STM8AF/P6388 数据表(PDF) 38 Page - STMicroelectronics |
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STM8AF/P6388 数据表(HTML) 38 Page - STMicroelectronics |
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38 / 116 page  Pinouts and pin description STM8AF6388 38/116 DocID031156 Rev 1 1. In Halt/Active-halt mode, this pin behaves as follows: - The input/output path is disabled. - If the HSE clock is used for wakeup, the internal weak pull-up is disabled. - If the HSE clock is off, the internal weak pull-up setting is used. It is configured through Px_CR1[7:0] bits of the corresponding port control register. Px_CR1[7:0] bits must be set correctly to ensure that the pin is not left floating in Halt/Active-halt mode. 2. In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer, week pull-up and protection diode to VDD are not implemented) 3. The PD1 pin is in input pull-up during the reset phase and after reset release. 4. If this pin is configured as interrupt pin, it will trigger the TLI. |
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