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VIPERGAN100TR 数据表(PDF) 3 Page - STMicroelectronics |
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VIPERGAN100TR 数据表(HTML) 3 Page - STMicroelectronics |
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3 / 35 page ![]() Pin N. Name Function During GAN's on-time, the current sourced by the pin is monitored to get an image of the input voltage to the converter, used for feed-forward compensation. During GAN's off-time, a voltage exceeding the OVP threshold shuts the IC down reducing the device consumption. This function is strobed and digitally filtered for high noise immunity. 12 VDD Controller supply. An electrolytic capacitor, connected between this pin and GND, is initially charged by the internal HV start-up generator. A 100 nF ceramic cap between VDD and GND, as close as possible to the IC, might be required to reject high frequency disturbances from internal circuitries. 13 DRV GaN driver section supply. An internal voltage regulator tightly sets the driving voltage for GaN to 6 V to obtain best performance. A low ESR/ESL 1 µF ceramic capacitor placed between this pin and GND is required. 15,16 DRAIN Drain pin of the GAN switch EP EP Exposed Pad. This pin is mechanically connected to the controller die pad of the frame. In order to improve noise immunity it must be connected to GND. VIPERGAN100 Pin connections and function DS14000 - Rev 1 page 3/35 |
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