FS32R274VCK2VMM datasheet(21/78 Pages) NXP

21 / 78 page

Table 12. ESD ratings (continued)

No.

Symbol

Parameter

Conditions1

Class

Max value2

Unit

conforming to AEC-

Q100-002

VESD(CDM)

Electrostatic discharge

(Charged Device Model)

TA = 25 °C

conforming to AEC-

Q100-011

C3A

5003

750 (corners)

1. All ESD testing is in conformity with CDF-AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits.

2. Data based on characterization results, not tested in production.

3. 500 V for non-AFE pins, 250 V for AFE pins.

I/O Parameters

5.1 I/O pad DC electrical characteristics

NMI, TCK, TMS, JCOMP are treated as GPIO.

Table 13. I/O pad DC electrical specifications

Symbol

Parameter

Value

Unit

Min

Max

Vih_hys

CMOS Input Buffer High Voltage (with hysteresis

enabled)

0.65*VDD_HV_IO VDD_HV_IO + 0.3

Vil_hys

CMOS Input Buffer Low Voltage (with hysteresis

enabled)

-0.3

0.35*VDD_HV_IO

Vih

CMOS Input Buffer High Voltage (with hysteresis

disabled)

0.55 * VDD_HV_IO VDD_HV_IO + 0.3

Vil

CMOS Input Buffer Low Voltage (with hysteresis

disabled)

-0.3

0.40 * VDD_HV_IO

Vhys

CMOS Input Buffer Hysteresis

0.1 * VDD_HV_IO

—

VihTTL

TTL Input high level voltage (All SAR_ADC input pins)

VDD_HV_ADCREFx

+ 0.3

VilTTL

TTL Input low level voltage (All SAR_ADC input pins)

-0.3

0.56

VhystTTL

TTL Input hysteresis voltage (All SAR_ADC input pins)

0.3

—

Pull_Ioh

Weak Pullup Current1

µA

Pull_Iol

Weak Pulldown Current2

µA

Iinact_d

Digital Pad Input Leakage Current (weak pull inactive)

-2.5

2.5

µA

Voh

Output High Voltage3

0.8 * VDD_HV_IO

—

Vol

Output Low Voltage4

—

0.2 * VDD_HV_IO

Ioh_f

Full drive Ioh5 (ipp_sre[1:0] = 11)

Iol_f

Full drive Iol5 (ipp_sre[1:0] = 11)

120

Ioh_h

Half drive Ioh5 (ipp_sre[1:0] = 10)

Iol_h

Half drive Iol5 (ipp_sre[1:0] = 10)

10.5

I/O Parameters

S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021

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