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ILPS28QSWTR 数据表(PDF) 18 Page - STMicroelectronics |
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ILPS28QSWTR 数据表(HTML) 18 Page - STMicroelectronics |
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18 / 52 page ![]() 6.4 Bypass-to-FIFO mode In bypass-to-FIFO mode (FIFO_CTRL (14h)(TRIG_MODES and F_MODE[1:0] = 101), FIFO behavior switches when the INT_SOURCE (24h)(IA) bit rises for the first time. When the INT_SOURCE (24h)(IA) bit is equal to 0, FIFO behaves like in bypass mode. Once the INT_SOURCE (24h)(IA) bit rises to 1, FIFO behavior switches and keeps behaving like in FIFO mode. An interrupt generator has to be set to the desired configuration through INTERRUPT_CFG (0Bh). Figure 11. Bypass-to-FIFO mode P1 P2 Pi empty P0 P127 P1 P2 Pi P0 P127 Bypass Mode FIFO Mode Trigger event ILPS28QSW Bypass-to-FIFO mode DS13905 - Rev 1 page 18/52 |
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