Figure 12. Power GOOD pin behavior

6.7

Truth table

Table 16. Truth table

x = maintain the previous condition.

Condition

Status register BITx

OUTx

Fault register BITx

FAULT

PGOOD

Normal operation

1

ON

0

H (not active)

H (not active)

0

OFF

0

Thermal Junction (TJX> TJSD)

1

OFF

1

L (active)

Don‘t care

0

OFF

1

H (not active)

Thermal Case TC > TCSD

See Figure 20

Don‘t care

Don‘t care

VCC UVLO FAULT

(Figure 12)

0

OFF

X

X

L (active)

1

POWER GOOD FAULT

(Figure 12)

1

ON

Don‘t care

Don‘t care

L (active)

0

OFF

VDD UVLO

(Watchdog)

X

OFF

X

H (not active)

H (not active)

SPI FAULT

(module-8 violation)

X

X

Don‘t care

L (active)

Don‘t care

Internal communication error

X

X

X

L (active)

Don‘t care

6.7.1

Junction over-temperature

The thermal status of the device is updated during each transmission sequence between the two isolated stages.

ISO808A, ISO808A-1

Truth table

DS14170 - Rev 1

page 18/38