P87LPC767 datasheet(53/60 Pages) PHILIPS

53 / 60 page

Philips Semiconductors

Product data

87LPC767

Low power, low price, low pin count (20 pin)

microcontroller with 4-kbyte OTP and 8-bit A/D converter

2001 Aug 07

COMPARATOR ELECTRICAL CHARACTERISTICS

VDD = 3.0 V to 6.0 V unless otherwise specified; Tamb = 0 °C to +70 °C, –40 °C to +85 °C, or –40 °C to +125 °C, unless otherwise specified

SYMBOL

PARAMETER

TEST CONDITIONS

LIMITS

UNIT

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VIO

Offset voltage comparator inputs1

±10

VCR

Common mode range comparator inputs

VDD–0.3

CMRR

Common mode rejection ratio1

–50

Response time

250

500

Comparator enable to output valid

µs

IIL

Input leakage current, comparator

0 < VIN < VDD

±10

µA

NOTE:

1. This parameter is guaranteed by characterization, but not tested in production.

A/D CONVERTER DC ELECTRICAL CHARACTERISTICS

Vdd = 3.0 V to 6.0 V unless otherwise specified;

Tamb = 0 to +70

°C for commercial, -40 °C to +85 °C for industrial, or –40 °C to +125 °C for extended industrial, unless otherwise specified.

SYMBOL

PARAMETER

TEST CONDITIONS

LIMITS

UNIT

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

AVIN

Analog input voltage

VSS - 0.2

VDD + 0.2

RREF

Resistance between VDD and VSS

A/D enabled

tbd

Ω

CIA

Analog input capacitance

DLe

Differential non-linearity1,2,3

±1

LSB

ILe

Integral non-linearity1,4

±1

LSB

OSe

Offset error1,5

±1

LSB

Gain error1,6

±1

Absolute voltage error1,7

±1

LSB

MCTC

Channel-to-channel matching

±1

LSB

Crosstalk between inputs of port8

0 to 100 kHz

-60

Input slew rate

100

V/ms

Input source impedance

Ω

NOTES:

1. Conditions: VSS = 0 V; VDD = 5.12 V.

2. The A/D is monotonic, there are no missing codes

3. The differential non-linearity (DLe) is the difference between the actual step width and the ideal step width. See Figure 40.

4. The integral non-linearity (ILe) is the peak difference between the center of the steps of the actual and the ideal transfer curve after

appropriate adjustment of gain and offset errors. See Figure 40.

5. The offset error (OSe) is the absolute difference between the straight line which fits the actual transfer curve (after removing gain error), and

the straight line which fits the ideal transfer curve. See Figure 40.

6. The gain error (Ge) is the relative difference in percent between the straight line fitting the actual transfer curve (after removing offset error),

and the straight line which fits the ideal transfer curve. Gain error is constant at every point on the transfer curve. See Figure 40.

7. The absolute voltage error (Ae) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated

ADC and the ideal transfer curve.

8. This should be considered when both analog and digital signals are input simultaneously to A/D pins.

9. Changing the input voltage faster than this may cause erroneous readings.

10. A source impedance higher than this driving an A/D input may result in loss of precision and erroneous readings.

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P87LPC767 数据表(PDF) 53 Page - NXP Semiconductors

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