FN2475 Rev 3.00

Page 1 of 9

September 1995

FN2475

Rev 3.00

September 1995

HCS273MS

Radiation Hardened Octal D Flip-Flop

DATASHEET

Features

• 3 Micron Radiation Hardened CMOS SOS

• Total Dose 200K RAD (Si)

• SEP Effective LET No Upsets: >100 MEV-cm2/mg

• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/

Bit-Day (Typ)

• Dose Rate Survivability: >1 x 1012 RAD (Si)/s

• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse

• Latch-Up Free Under Any Conditions

• Military Temperature Range: -55oC to +125oC

• Significant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

- VIL = 0.3 VCC Max

- VIH = 0.7 VCC Min

• Input Current Levels Ii

 5A at VOL, VOH

Description

The Intersil HCS273MS is a Radiation Hardened octal D flip-

flop, positive edge triggered, with reset.

The HCS273MS utilizes advanced CMOS/SOS technology

to achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCS273MS is supplied in a 20 lead Ceramic

flatpack (K suffix) or a SBDIP Package (D suffix).

Pinouts

20 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T20, LEAD FINISH C

TOP VIEW

20 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP4-F20, LEAD FINISH C

TOP VIEW

11

12

13

14

15

16

17

18

20

19

10

9

8

7

6

5

4

3

2

1

MR

Q0

D0

D1

Q1

Q2

D3

D2

Q3

GND

VCC

D7

D6

Q6

Q7

Q5

D5

D4

Q4

CP

2

3

4

5

6

7

8

120

19

18

17

16

15

14

13

MR

Q0

D0

D1

Q1

Q2

D2

D3

9

10

12

11

Q3

GND

VCC

Q7

D7

D6

Q6

Q5

D5

D4

Q4

CP

Ordering Information

PART NUMBER

TEMPERATURE RANGE

SCREENING LEVEL

PACKAGE

HCS273DMSR

-55oC to +125oC

Intersil Class S Equivalent

20 Lead SBDIP

HCS273KMSR

-55oC to +125oC

Intersil Class S Equivalent

20 Lead Ceramic Flatpack

HCS273D/Sample

+25oC

Sample

20 Lead SBDIP

HCS273K/Sample

+25oC

Sample

20 Lead Ceramic Flatpack

HCS273HMSR

+25oCDie

Die