AFE7901 datasheet(84/160 Pages) TI

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7.12.8 TX Typical Characteristics at 30 MHz and 400 MHz (continued)

Typical values at TA = +25°C with nominal supplies. Default conditions: TX input data rate = 125 MSPS, fDAC = 6000

MSPS (48x interpolation), interleave mode, 1st Nyquist zone output, PLL clock mode with fREF = 500 MHz. Additional default

conditions for all plots, AOUT = –1 dBFS, DSA = 0 dB, Sin(x)/x enabled, DSA calibrated, TX Clock Dither Enabled

including PCB and cable losses

Figure 7-269. TX Output Fullscale vs Temperature at 400 MHz

including PCB and cable losses

Figure 7-270. TX Output Fullscale vs DSA Setting at 400 MHz

Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA

Setting) + 1

Figure 7-271. Uncalibrated TX Differential Gain Error (DNL) at

400 MHz

Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA

Setting) + 1

Figure 7-272. Calibrated TX Differential Gain Error (DNL) at 400

MHz

Integrated Gain Error = POUT(DSA Setting) –

POUT(DSASetting = 0) + (DSA Setting)

Figure 7-273. Uncalibrated TX Integrated Gain Error (INL) at 400

MHz

Integrated Gain Error = POUT(DSA Setting) –

POUT(DSASetting = 0) + (DSA Setting)

Figure 7-274. Calibrated TX Integrated Gain Error (INL) at 400

MHz

AFE7901

SBASAO5 – APRIL 2023

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