Datasheet

9-Feb-2022

CFR0011-120-01

Revision 1.04

Page 2 of 9

SLG55022-200030

High Voltage Gate Driver

©2022 Renesas Electronics Corporation

Pin Description

Overview

The SLG55022 N-Channel FET Gate Driver is used for controlling a delayed turn on and ramping slew rate of the source voltage

on N-Channel FET switches from a CMOS logic level input. Intended as a supporting control element for switched voltage rails

in energy efficient, advanced power management systems, the SLG55022 also integrates circuits to discharge opened switched

voltage rails. The gate driver is available in a variety of configurations supporting a range of turn-on slew rates from 0.80 V/ms

up to 4 V/ms which, depending on load supplying source voltages in the range of 1.0 V to 20 V results in ramp times from 200

µs

to over 20 ms (see Application Section). Delays until the ramp begins are source voltage independent and range from 250

µs to

5ms. A power good condition is output to indicate that the ramp-up slew of the source voltage is finished. Additionally, an internal

discharge circuit provides a controlled path to remove charge from open power rails. The SLG55022 gate drive is packaged in

an 8 pin DFN package.

When used with external N-Channel FETs, the SLG55022 supports low transient, energy efficient switching of high current loads

at source voltages ranging from 1.0V to 20V.

Ordering Information

Pin #

Pin Name

Type

Pin Description

VCC

1

Power

Supply Voltage

ON

2

Input

CMOS Logic Level. High True

NC

3

--

No Connect.

GND

4

GND

Ground.

D

5

Input

FET Drain Connection

S

6

Input

Source Connection

G

7

Output

FET Gate Drive

PG

8

Output

Output CMOS Open Drain - Power Good, indicates external FET fully on. Pull-up resistor

greater than 300 k

Ω recommended.

Part Number

Type

SLG55022-200030V

TDFN-8

SLG55022-200030VTR

TDFN-8 - Tape and Reel (3k units)