ZLED7000 Datasheet

© 2016 Integrated Device Technology, Inc.

10

April 20, 2016

S

ADJ

DC

_

OUT

R

V

079

.

0

I

∗

=

2.3.2

PWM Control

The output current on LX can be set to a value below the nominal average value determined by resistor RS by

using an external PWM signal as the control signal applied to the ADJ pin. This control signal must be capable of

driving the ZLED7000’s internal 500kΩ pull-up resistor. See Figure 2.1 for an illustration. The minimum signal

voltage range is 0V to 1.8V; the maximum voltage range is 0V to 5V. See Table 1.3 for the specifications for the

signal’s duty cycle DPWM. Any negative spikes on the control signal could interfere with current control or proper

operation of the ZLED7000.

Figure 2.1

Directly Driving ADJ Input with a PWM Control Signal

2.3.3

External DC Voltage Control of Output Current

The output current on LX can be set to a value below the nominal average value determined by resistor RS by

using an external DC voltage VADJ (0.3 V

≤ V

ADJ

≤ 1.2V) to drive the voltage at the ADJ pin. This allows adjusting

the output current from 25% to 100% of IOUTnom. See Figure 2.2 for an illustration. The output current can be

calculated using equation (2). If VADJ matches or exceeds VREF (1.2V), the brightness setting is clamped at its

maximum (100%).

Figure 2.2

External DC Control Voltage at ADJ Pin

ADJ

GND

ZLED7000

DC

(2)

Where

IOUT_DC = Nominal average output current through the LED(s) with a DC control voltage

VADJ = External DC control voltage: 0.3 V

≤ V

ADJ

≤ 1.2V

RS

≥0.13Ω

PWM

1.8V to 5V

0V

ADJ

GND

ZLED7000