ZLED7x20 Datasheet

© 2016 Integrated Device Technology, Inc.

21

April 20, 2016

3.3.5

Capacitor C3 for Reducing Output Ripple

If required, the C3 can be used to reduce peak-to-peak ripple current in the LED string. Low ESR capacitors

should be used because the efficiency of C3 largely depends on its ESR and the dynamic resistance of the LEDs.

For an increased number of LEDs, using the same capacitor will be more effective. Lower ripple can be achieved

with higher capacitor values, but this will increase start-up delay by reducing the slope of the LED voltage as well

as cause increased current during converter start-up. The capacitor will not affect operating frequency or effici-

ency. For a simulation or bench optimization, C3 values of a few μF are an applicable starting point for the given

configuration. Ripple current reduction is approximately proportional to the value of C3.

3.3.6

Diode D1

The flyback diode D1 must have a continuous current rating greater than the maximum output load current and a

peak current rating higher than the peak L1 coil current. Important: Use a low-capacitance, fast Schottky diode

that has low reverse leakage at the maximum operating temperature and maximum operating voltage for the

application to avoid excess power dissipation and optimize performance and efficiency. For silicon diodes, there is

a concern that the higher forward voltage and increased overshoot from reverse recovery time could increase the

peak LX pin voltage (VLX). The total voltage VLX (including ripple voltage) must not be >50V.

3.4

Application Circuit Layout Requirements

The following guidelines are strongly recommended when laying out application circuits:

• Important: Locate the L1 inductor and the C1 input decoupling capacitor as close as possible to the

ZLED7x20 to minimize parasitic inductance and resistance, which can compromise efficiency. Use low

resistance connections from L1 to the LX and VIN pins.

• All circuit board traces to the LX pin must be as short as possible because it is a high-speed switching

node.

• If the ADJ pin floats, all circuit board traces to the ADJ pin must be as short as possible to reduce noise

pickup.

• Do not lay out high-voltage traces near the ADJ pin because if the board is contaminated, leakage current

can affect the ADJ pin voltage and cause unintended output current. To further reduce this risk, use a

ground ring around the ADJ pin. (Also see section 2.8 regarding the ZLED7x20’s protection circuitry for

preventing excessive output current.)

• To minimize ground bounce, locate the 0.1μF external capacitor C2 as close as possible to the V

IN pin and

solder the ZLED7x20’s GND pin directly to the ground plane. (Also, see section 3.3.4 regarding ground

bounce.)

• Because Rs is typically a low value resistor, it is important to consider the resistance of the traces in series

with RS as part of the total current sense resistance. Use traces that are as short and wide as possible to

minimize this effect.

• The ZLED7x20’s thermal pad must be grounded.