ZLED7x20 Datasheet

© 2016 Integrated Device Technology, Inc.

13

April 20, 2016

Brightness is 100% if VADJ = VREF, the internal reference voltage, which can be measured on the ADJ pin when it is

floating (1.2V, typical). If VADJ

≥ 1.2V, the current is automatically clamped at 100% brightness.

Note: Absolute maximum VADJ= 6V.

2.4

Additional Requirements if the VIN Input Voltage has a High Slew Rate

The analog dimming input ADJ can be used for implementing a soft-start function of the LEDs by connecting a

capacitor to ground. The soft-start time constant is determined by the product of the internal pull-up resistor

(500k

Ω typical) and the external capacitor.

Important: If the supply voltage VIN might have a high slew rate (> 1V/µs) when powered on, a resistor that is

≥ 1kΩ must be placed in series with the capacitor to guarantee correct power-on timing for the ZLED7x20 and

proper loading of the current sense trimming data into the appropriate register. This resistor is not necessary if the

capacitor is

≤ 470pF.

If the ADJ pin is controlled from an external voltage source or PWM signal, a series resistor is strongly

recommended for noise immunity reasons and to avoid bulk current injection.

2.5

Control of Output Current via a PWM Signal on the ADJ Pin

An external pulse width modulation (PWM) control signal input on the ADJ pin can be used for brightness or gated

on/off control of the output current by driving the output current to a value below the nominal average current

determined by RS. See Figure 3.3 for a typical application circuit. The PWM or gated on/off control signal can be

within the range of 0 to 5 V. The logic high level must be higher than 1.2V and the logic low level must be below

0.2V. It must be capable of driving the ADJ pin’s input impedance RADJ (

approximately 500kΩ; internal pull-up

resistor to VREF).

2.6

Control of Output Current via a Microcontroller Signal on the ADJ Pin

An external control signal from the open drain output of a microcontroller can provide on/off or PWM brightness

control by driving the ADJ pin. See Figure 3.4 for a typical application circuit. Diode D2 and resistor R1 shown in

Figure 3.4 suppress any negative high-amplitude spikes on the ADJ input due to the drain-source capacitance of

the FET in the microcontroller’s output. Negative spikes on the ADJ input could cause output current errors or

unintended ZLED7x20 operation. The signal input to the ADJ pin must be capable of driving the ADJ pin’s input

impedance RADJ (

approximately 500kΩ; internal pull-up resistor to VREF).

2.7

Shutdown Mode

If the ADJ pin voltage VADJ is

≤ V

ADJoff (0.2V ± 0.05V), the supply current and output on the LX pin are quiescent at

a low standby level (IINQoff =

120μA nominal). Raising the ADJ pin voltage so that V

ADJ

≥ V

ADJion (0.25V ± 0.05V)

will switch the output back to full operational mode.