Data Sheet

ADR3625/ADR3630/ADR3650

THEORY OF OPERATION

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Rev. A | 20 of 26

LONG-TERM DRIFT

The stability of a precision signal path over its lifetime, or between

calibration procedures, is dependent on the long-term stability of

the analog components in its path, such as op amps, references,

and data converters. To help system designers predict the long-

term drift of the circuits that use the ADR3625\ADR3630\ADR3650,

Analog Devices measured the output voltage of multiple units for

more than 3500 hours using a high precision measurement system,

including an ultrastable oil bath. To replicate the real-world system

performance, the devices under test (DUTs) were soldered onto an

FR4 PCB using a standard reflow profile (as defined in the JEDEC

J-STD-020D standard), rather than testing them in sockets. This

manner of testing is important because expansion and contraction

of the PCB can apply stress to the IC package and contribute to

shifts in the offset voltage.

Note that early life drift (0 hours to 250 hours) accounts for 50%

of the total drift observed over 3500 hours, as shown in Figure 63.

The first 1000 hours account for the 80% of the total drift, and the

remaining 2500 hours account for the remaining 20% of the drift.

Thus, the early life drift is the dominant contributor, whereas the

drift after 1000 hours is significantly lower.

Figure 63. Long-Term Drift

THERMAL HYSTERESIS

In addition to stability over time, as described in the Long-Term

Drift section, it is useful to know the thermal hysteresis, that is, the

stability vs. cycling of temperature. Thermal hysteresis is an impor-

tant parameter because it tells the system designer how closely the

signal returns to its starting amplitude after the ambient temperature

changes and the subsequent return to room temperature. Figure 64

shows the change in output voltage as the temperature cycles four

times from room temperature to +125°C to −40°C and back to room

temperature.

Other than the first full cycle, the output hysteresis is typically

−7 ppm. The histogram in Figure 65 shows that the hysteresis

is larger when the device cycles through only a half cycle, from

room temperature to 125°C and back to room temperature, typically

15 ppm.

Figure 64. Change in Output Voltage over Four Full Temperature Cycle

Figure 65. Output Voltage Hysteresis Histogram (−40°C to +125°C)

POWER CYCLE HYSTERESIS

By power cycling large numbers of samples, the power cycle hyste-

resis can be determined. To keep this measurement independent of

other variables and environmental effects, the power cycle testing

was performed using a high precision measurement system, includ-

ing an ultrastable oil bath.

Figure 66 shows the power cycle hysteresis. The units were pow-

ered down for approximately four hours and then powered up.

The ADR3625\ADR3630\ADR3650 do not have any power cycle

hysteresis even after a long power-down period, making these devi-

ces suitable for equipment that must maintain calibration accuracy

between power cycles.