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HC705CT4GRS/D 数据表(PDF) 21 Page - NXP Semiconductors

部件名 HC705CT4GRS/D
功能描述  General Release Specification
PDF  152 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

HC705CT4GRS/D 数据表(HTML) 21 Page - NXP Semiconductors

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General Description
Signal Description
MC68HC705CT4 — Rev. 2.0
General Release Specification
MOTOROLA
General Description
21
The IRQ pin contains an internal Schmitt trigger as part of its input to
improve noise immunity.
NOTE:
The voltage on the IRQ pin affects the mode of operation. See Section
6. Operating Modes.
CAUTION:
Port C interrupt is an external interrupt provided by port C that is
generated when the part comes out of reset. Therefore, an interrupt is
pending that is not being serviced until the CLI instruction is executed.
This interrupt is produced because the state of mask option register
(MOR) is not known until a few clock cycles after the part comes out of
reset. After this interrupt occurs, normal operation resumes, unless the
part is put in reset again.
1.4.4 OSC1 and OSC2
These pins provide control input for an on-chip clock oscillator circuit that
drives the PLL reference source. A crystal resonator, a ceramic
resonator, or an external signal connects to these pins providing a
system clock. The oscillator frequency is selectable between 5 or 40
times the internal bus rate. Typical oscillator configurations and
component values are shown in Figure 1-4. The manufacturer of the
crystal should be consulted, since actual component values are
dependent on the type of crystal used.
Figure 1-4. Oscillator Connections
<
OSC1
OSC2
OSC1
OSC2
MCU
MCU
EXTERNAL CLOCK
UNCONNECTED
(a) Crystal/Ceramic Resonator
(b) External Clock Source
10 M
10.24 MHz
Oscillator Connections
Connections
15 pF
15 pF
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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