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AD9389/PCB 数据表(PDF) 3 Page - Analog Devices

部件名 AD9389/PCB
功能描述  800 MHz High Performance HDMI/DVI Transmitter
PDF  48 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9389/PCB 数据表(HTML) 3 Page - Analog Devices

  AD9389/PCB Datasheet HTML 1Page - Analog Devices AD9389/PCB Datasheet HTML 2Page - Analog Devices AD9389/PCB Datasheet HTML 3Page - Analog Devices AD9389/PCB Datasheet HTML 4Page - Analog Devices AD9389/PCB Datasheet HTML 5Page - Analog Devices AD9389/PCB Datasheet HTML 6Page - Analog Devices AD9389/PCB Datasheet HTML 7Page - Analog Devices AD9389/PCB Datasheet HTML 8Page - Analog Devices AD9389/PCB Datasheet HTML 9Page - Analog Devices Next Button
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AD9389
Rev. 0 | Page 3 of 48
ELECTRICAL SPECIFICATIONS
Table 1.
Parameter
Temp
Test Level1
Min
Typ
Max
Unit
DIGITAL INPUTS
Input Voltage, High (VIH)
Full
VI
1.4
V
Input Voltage, Low (VIL)
Full
VI
0.7
V
Input Current, High (VIH)
Full
V
−1.0
mA
Input Current, Low (VIL)
Full
V
+1.0
mA
Input Capacitance
25°C
V
3
pF
DIGITAL OUTPUTS
Output Voltage, High (VOH)
Full
VI
AVDD − 0.1
V
Output Voltage, Low (VOL)
Full
VI
0.4
V
THERMAL CHARACTERISTICS
θJC Junction-to-Case
Thermal Resistance
V
25
°C/W
θJA Junction-to-Ambient
Thermal Resistance
V
30
°C/W
Ambient Temperature
Full
V
0
25
70
°C
DC SPECIFICATIONS
Input Leakage Current, IIL
25°C
VI
−10
+10
μA
Input Clamp Voltage (−16 mA)
25°C
V
−0.8
V
Input Clamp Voltage (+16 mA)
25°C
V
+0.8
Differential High Level Output Voltage
V
AVCC
V
Differential Output Short-Circuit Current
V
10
μA
POWER SUPPLY
VDD (All) Supply Voltage
Full
IV
1.71
1.8
1.89
V
VDD Supply Voltage Noise
Full
V
50
mV p-p
Complete Power-Down Current
(Everything Except I2C)
25°C
IV
6
13
mA
Quiet Power Down Current
(Monitor Detect On)
25°C
VI
7
mA
Transmitter Supply Current
(27 MHz Typical Random Pattern)
25°C
VI
165
mA
Transmitter Supply Current
(80 MHz Typical Random Pattern)
25°C
IV
185
205
mA
Transmitter Total Power
(80 MHz Single Pixel Stripe Pattern; Worst
Case Operating Conditions)
Full
VI
430
mW
AC SPECIFICATIONS
CLK Frequency
25°C
IV
13.5
80
MHz
CLK Duty Cycle
25°C
VII
40
60
%
Worst Case CLK Input Jitter
Full
VI
1.0
ns
Setup Time to CLK Falling Edge
VI
TBD
TBD
ns
Hold Time to CLK Falling Edge
VI
TBD
TBD
ns
TMDS Differential Swing
VII
800
1000
1200
mV
VSYNC and HSYNC Delay from DE Falling Edge
VI
1
UI
VSYNC and HSYNC Delay to DE Rising Edge
VI
1
UI
DE High Time
25°C
VI
8191
UI
DE Low Time
25°C
VI
138
UI
Differential Output Swing Low-to-High
Transition Time
25°C
VII
75
490
ps
Differential Swing Output High-to-Low
Transition Time
25°C
VII
75
490
ps



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