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AD12401/KIT 数据表(PDF) 4 Page - Analog Devices |
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AD12401/KIT 数据表(HTML) 4 Page - Analog Devices |
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4 / 28 page  AD12401 Rev. A | Page 4 of 28 AD12401-xxxKWS AD12401-xxxJWS Parameter Case Temp Test Level Min Typ Max Min Typ Max Unit LOGIC OUTPUTS (DRA, DRB, OUTPUT BITS)3 Differential Output Voltage Full IV 247 350 454 247 350 454 mV Output Common-Mode Voltage Full IV 1.125 1.25 1.375 1.125 1.25 1.375 V Output High Voltage 60°C IV 1.602 1.602 V Output Low Voltage 60°C IV 0.898 0.898 V 1 Tested using input frequency of 70 MHz (see Figure 17). 2 Refer to Table 8 for logic convention on all logic inputs. 3 Digital output logic levels: VC = 3.3 V, CLOAD = 8 pF, 2.5 V LVDS, RT = 100 Ω. AC SPECIFICATIONS1—ENCODE = 400 MSPS VA = 3.7 V, VC = 3.3 V, VD = 1.5 V, ENCODE = 400 MSPS, 0°C ≤ TCASE ≤ 60°C, unless otherwise noted. Table 2. AD12401-400KWS AD12401-400JWS Parameter Case Temp Test Level Min Typ Max Min Typ Max Unit DYNAMIC PERFORMANCE SNR Analog Input 10 MHz Full I 62 64 60 62 dBFS @ −1.0 dBFS 70 MHz Full I 61.5 63.5 59.5 61.5 dBFS 128 MHz Full I 60 63 58 61 dBFS 175 MHz Full I 60 62.5 57.5 60.5 dBFS SINAD2 Analog Input 10 MHz Full I 59 63.5 57 61.5 dBFS @ −1.0 dBFS 70 MHz Full I 58.5 63 56.5 61 dBFS 128 MHz Full I 57.5 61.5 55.5 59.5 dBFS 175 MHz Full I 55 60 53 58 dBFS Spurious-Free Dynamic Range3 Analog Input 10 MHz Full I 69 85 69 85 dBFS @ −1.0 dBFS 70 MHz Full I 69 80 69 80 dBFS 128 MHz Full I 66 72 66 72 dBFS 175 MHz Full I 62 68 62 68 dBFS Image Spur4 Analog Input 10 MHz Full I 60 75 60 75 dBFS @ −1.0 dBFS 70 MHz Full I 60 72 60 72 dBFS 128 MHz Full I 60 66 60 66 dBFS 175 MHz Full I 57 63 57 63 dBFS Offset Spur4 Analog Input @ −1.0 dBFS 60°C V 65 65 dBFS Two-Tone IMD5 F1, F2 @ −6 dBFS 60°C V −75 −75 dBc ANALOG INPUT Frequency Range Full IV 10 175 10 175 MHz DIGITAL INPUT (DR_EN) Minimum Time (Low) Full IV 5.0 5.0 ns SWITCHING SPECIFICATIONS Conversion Rate6 Full IV 396 400 404 396 400 404 MSPS Encode Pulse Width High (tEH)1 60°C V 1.25 1.25 ns Encode Pulse Width Low (tEL)1 60°C V 1.25 1.25 ns |
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