ADE7762

Preliminary Technical Data

Rev. PrB | Page 8 of 28

Pin No.

Mnemonic

Description

21

CLKIN

Master Clock for the ADCs and Digital Signal Processing. An external clock can be provided at this logic

input. Alternatively, a parallel resonant AT crystal can be connected across CLKIN and CLKOUT to

provide a clock source for the ADE7762. The clock frequency for the specified operation is 10 MHz.

Ceramic load capacitors between 22 pF and 33 pF should be used with the gate oscillator circuit. Refer

to the crystal manufacturer’s data sheet for the load capacitance requirements.

22

CLKOUT

A crystal can be connected across this pin and CLKIN as described previously to provide a clock source

for the ADE7762. The CLKOUT pin can drive one CMOS load when an external clock is supplied at CLKIN

or when a crystal is being used.

23, 24

S0, S1

These logic inputs are used to select one of four possible frequencies for the digital-to-frequency

conversion for design flexibility.

25, 26

F2, F1

Low Frequency Logic Outputs. F1 and F2 supply average active power information. The logic outputs

can be used to drive electromechanical counters and 2-phase stepper motors directly (see the Transfer

Function section).

27

LED_C

Phase C Phase Monitor Output. LEDs are connected to this pin to indicate phase drop or reverse power

on phase C (see the Phase Monitor section).

28

LED_B

Phase B Phase Monitor Output. LEDs are connected to this pin to indicate phase drop or reverse power

on phase B (see the Phase Monitor section).