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CS3394 数据表(PDF) 1 Page - Applied Micro Circuits Corporation |
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CS3394 数据表(HTML) 1 Page - Applied Micro Circuits Corporation |
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1 / 2 page  – At a Glan ce – Product Brief S3394 SONET/SDH/FEC OC-192 Receiver with EDC Technology Empowering Intelligent Optical Networks 1 PB1642_v1.01_11/05/03 Description The S3394 SONET/SDH/FEC Receiver device is one of the latest additions to the AMCC DispersionXXTM product family. This device provides full deserialization capabilities for OC-192 applications and is suitable for Metropolitan, Long-Haul, Ultra Long- Haul, and Dense Wavelength Division Multiplexing (DWDM) networks. The device performs all necessary serial-to- parallel functions in conformance with the SONET/SDH transmission standards. The standard operating range is from 9.9 to 11.3 Gbps. AMCCs proprietary DispersionXXTM technology allows system designers to optimize coding gain without additional overhead expansion beyond the standard FEC data rate of 10.7 Gbps. Figure 1, System Block Diagram, shows a typical system configuration for the S3394 device. Overview The S3394 device can be used to implement the front end of SONET/SDH/ FEC equipment which consists primarily of the serial receive interface. The system timing circuitry consists of a high- speed phase detector, clock dividers, and clock distribution. The devices utilize on-chip clock synthesis PLL components that allow the use of a slower external clock references, 155.52 or 622.08 (plus FEC rate) MHz, in support of existing system clocking schemes. The low-jitter, 16-bit, Low Voltage Differential Signaling (LVDS) interfaces guarantee compliance with the bit-error rate requirements of the Telcordia and ITU-T standards. S3 39 4 AMCC Suggested Interface Devices Verrazano (S2509) Quad SONET/SDH/Digital Wrapper Backplane Serdes Ganges II (S19202) STS-192 SONET/SDH Framer Hudson II (S19203) Digital Wrapper - FEC (7% Over- head) Mekong (S19204) STS-192 SONET/SDH MUX/ DeMUX with PP Khatanga (S19205) 10 GbE MAC and PHY/STS-192c POS Framer & Mapper Niagara (S19208) Digital Wrapper/Enhanced FEC (7% Overhead) General Features • Operational data rates at 9.9 to 11.3 Gbps • Selectable Electrical RZ or NRZ Modulation • Dispersion (ISI) compensation • Robust CRU – can extract clock in low OSNR environments • 16-bit OIF Compliant LVDS Data Path with Programmable Bit Swap • Integrated low pass filter (coarse/ fine adjust). • Peak detector for input power monitoring (SSI - Signal Strength Indicator) • Threshold and phase adjust capability • Sensitivity 6.0 mV (p-p, SE) • External phase adjust ± 0.30 UI • Linearity gain control – variable gain adjust • Selectable reference frequency of 155.52 or 622.08 MHz (or various protocol (+FEC)) • Complies with Telcordia/ITU-T/ OIF specifications • 3.3 V and 1.8 V power supplies • Compact 15 mm x 15 mm 196 Pin CBGA Package Continued on next page... Figure 1. System Block Diagram ORX OTX ORX OTX 16 16 16 16 AMCC NIAG ARA/ HUDSO N or ASIC MO D Driv er AMCC Mux AMCC TIA MO D Driv er AMCC Mux AMCC TIA AMCC NIAG ARA/ HUDSO N or ASIC AM CC S3394 RX AM CC S3394 RX |
类似零件编号 - CS3394 |
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类似说明 - CS3394 |
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