Empowering Intelligent Optical Networks

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Product Brief

RUBICON-48

OC-48/12/3 DW/FEC/PM and ASYNC Mapper Device with Strong FEC

Part Number S4815PBI, Revision 2.2, May 2006

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FORWARD ERROR CORRECTION CAPABILITY

Two FEC options are supported on the line side. The Rubicon-

48 can support standard RS(255,239) FEC compliant with

G.709, G.975, and compatible with the AMCC Hudson device.

The device can also support an enhanced FEC algorithm that

is applied using the same G.709 frame structure and rate as

the Hudson but providing more than 2 dB of additional coding

will operate in a mode where both encoders and decoders are

working simultaneously, allowing for a single chip transponder

to operate between two networks with different gain character-

istics.

LEGACY COMPATIBILITY

As indicated above, the Rubicon-48 also supports operation in

the G.975 mode. In this mode, the G.709 overhead processing

can be inhibited and direct access to the non-framing bytes in

the overhead column is provided through the pins on the

device. The device operates in the 255,238 mapping mode

with no stuff columns inserted in the FEC payload.

There is also some limited backwards compatibility with the

S3062 device, AMCC’s first generation 2.5G FEC device. The

details of this backwards compatibility are outlined in the full

Rubicon-48 datasheet.

CONTROL INTERFACE

A general purpose 16-bit microprocessor interface is provided

for control and monitoring. The interface supports both Intel

and Motorola type microprocessors, and is capable of operat-

ing in either interrupt driven or polled-mode configurations.

APPLICATION DIAGRAMS

Figure 2: Multi-Protocol LAN Transport

Figure 2 shows the Rubicon-48 in an edge transponder appli-

cation. The client side signals are first mapped into virtually

concatenated SONET streams. The Volta-48 supports a vari-

ety of client side signals including GE, FC, 2XFC, DVB, Ficon

and Escon. In addition to the flexible client interface on the

Volta-48, the chip also supports fractional GE interfaces,

allowing a less than full rate GE client to be transported. The

Volta-48 also includes an independent wide range CDR on

each client input, allowing the chip to interface directly to the

client optics module. Once the client payloads have been

mapped into VC SONET streams, an STS48 signal is pre-

sented on the high speed or line side of the Volta-48.

The Rubicon-48 then monitors and wraps it’s client signal into

an ODU-1 payload and appends the GFEC or EFEC code

necessary for transport. The PHY interface is achieved with

the S3485 CMOS transciever.

Figure 2: Multi-Protocol LAN Transport

Rubicon-48

Volta-48

10 Lanes of GE,

DVB, Escon, Ficon

FC, or 2XFC

1 x OTU1

2.7GHz

S3485

Rubicon-48

Volta-48

10 Lanes of GE,

DVB, Escon, Ficon

FC, or 2XFC

1 x OTU1

2.7GHz

S3485