AD7763 datasheet(17/32 Pages) AD

17 / 32 page

AD7763

Rev. 0 | Page 17 of 32

Thus, if this bit is set to logic high, every device on the serial

bus accepts the data written, regardless of the address bits. This

feature is particularly attractive if, for example, four devices are

being configured with the same user-defined filter. Instead of

having to download the filter configuration four times, only one

write is required. See the Downloading a User-Defined Filter

section for further details.

Writing to AD7763 is allowed at any time, even while reading a

conversion result. Note that after writing to the devices, valid

data is not output until after the settling time for the filter has

elapsed. The DVALID status bit is asserted at this point to

indicate that the filter has settled and that valid data is available

at the output.

READING STATUS AND OTHER REGISTERS

The AD7763 features a number of programmable registers. To

read back the contents of these registers or the status register,

the user must first write to the control register of the device,

setting a bit corresponding to the register to be read. The next

read operation then outputs the contents of the selected register

instead of a conversion result.

To ensure that the next read cycle contains the contents of the

in question must be completed a minimum of 8 × tSCO before

the falling edge of DRDY, which indicates the start of the next

read cycle.

More information on the relevant bits in the control register is

provided in the Registers section.

AD7763 数据表(PDF) 17 Page - Analog Devices