88C46-AF5-R datasheet(7/16 Pages) UTC

7 / 16 page

88CXX

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

www.unisonic.com.tw

QW-R502-040,A

TECHNICAL TERMS

1. Detection voltage (-VDET)

The detection voltage -VDET is the voltage at which the output switches to low. This detection voltage varies

slightly among products of the same type. The variation of voltages between the specified minimum [(-VDET)min.]

and maximum [(-VDET)max.] values is called the detection voltage range (See Figure 1).

Example: For the -VDET=1.5V, detection voltage lies in the range of 1.470≦(-VDET)≦1.530. This means that -VDET

is 1.470 in a product while -VDET is 1.530 in another of the same -VDET=1.5V.

2. Release voltage (+VDET)

The release voltage +VDET is the voltage at which the output returns (is “released”) to high. This release voltage

varies slightly among products of the same type. The variation of voltages between the specified minimum

[(+VDET)min.] and maximum [(+VDET)max.] values is called the release voltage range (See Figure 2).

Example: For the -VDET=1.5V, the release voltage lies in the range of 1.514≦(+VDET)≦1.652. This means that

+VDET is 1.514 in a product while +VDET is 1.652 in another of the same -VDET=1.5V.

Remark: Although the detection voltage and release voltage overlap in the range of 1.514 V ~ 1.530 V, +VDET

will always be larger than -VDET.

OUT

(-VDET)Max.

(-VDET)Min.

Detection voltage

Voltage range Detection

OUT

(+VDET) Max.

(+VDET) Min.

Release voltage

Release voltage range

VDD

Figure 1

Figure 2 (CD=0F)

3. Hysteresis width (VHYS)

The hysteresis width is the voltage difference between the detection voltage and the release voltage (B-A=VHYS in

Figure 7). By giving a device hysteresis, trouble such as noise at the input is avoided.

4. Delay time (td)

The delay time is a time that the input voltage to VDD terminal exceeds the release voltage (+VDET) and then the

output of the OUT terminal inverts. The delay time can be changed by the additional external capacitor CD.

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