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ICS9DB102 数据表(PDF) 2 Page - Renesas Technology Corp

部件名 ICS9DB102
功能描述  Two Output Differential Buffer for PCIe Gen1 & Gen2
PDF  14 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

ICS9DB102 数据表(HTML) 2 Page - Renesas Technology Corp

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IDT®
Two Output Differential Buffer for PCIe Gen1 & Gen2
852
REV Q 08/27/13
ICS9DB102
Two Output Differential Buffer for PCIe Gen1 & Gen2
2
Pin Configuration
20-pin SSOP & TSSOP
VDD
GND
5,9,12,16
6,15
PCI Express Outputs
96
SMBUS
20
19
IREF
20
19
Analog VDD & GND for PLL core
Description
Pin Number
Power Groups
Pin Description
PLL_BW 1
20 VDDA
CLK_INT 2
19 GNDA
C LK_INC 3
18 IREF
vCLKREQ0# 4
17 vCLKREQ1#
VDD 5
16 VDD
GND 6
15 GND
PCIEXT0 7
14 PCIEXT1
PCIEXC0 8
13 PCIEXC1
VDD 9
12 VDD
SMBD AT 10
11 SMBCLK
Note: Pins preceeded by ' v ' have internal
120K ohm pull down resistors
PIN #
PIN NAME
PIN TYPE
DESCRIPTION
1PLL_BW
IN
3.3V input for selecting PLL Band Width
0 = low, 1= high
2
CLK_INT
IN
True Input for differential reference clock.
3
CLK_INC
IN
Complementary Input for differential reference clock.
4
v CLKREQ0#
IN
Output enable for PCI Expres s output pair 0.
0 = enabled, 1 =disabled
5
VDD
PWR
Power supply , nominal 3.3V
6
GND
PWR
Ground pin.
7
PCIEXT0
OUT
True clock of differential PCI_Express pair.
8
PCIEXC0
OUT
Complementary clock of differential PCI_Express pair.
9
VDD
PWR
Power supply , nominal 3.3V
10
SMBDAT
I/O
Data pin of SMBUS c ircuitry, 5V tolerant
11
SMBCLK
IN
Clock pin of SMBUS c ircuitry, 5V tolerant
12
VDD
PWR
Power supply , nominal 3.3V
13
PCIEXC1
OUT
Complementary clock of differential PCI_Express pair.
14
PCIEXT1
OUT
True clock of differential PCI_Express pair.
15
GND
PWR
Ground pin.
16
VDD
PWR
Power supply , nominal 3.3V
17
v CLKREQ1#
IN
Output enable for PCI Expres s output pair 1.
0 = enabled, 1 =disabled
18
IREF
OUT
This pin establishes the reference for the differential current-mode
output pairs. It requires a fix ed precision resistor to ground. 475ohm is
the standard value for 100ohm differential impedance. Other
impedanc es require different values. See data sheet.
19
GNDA
PWR
Ground pin for the PLL c ore.
20
VDDA
PWR
3.3V power for the PLL core.
Pins preceeded by ' v ' have internal 120K ohm pull down resistors
Note:



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