IDT®

Four Output Differential Buffer for PCIe Gen 1 and Gen 2

ICS9DB403D

REV R 11/1/12

ICS9DB403D

Four Output Differential Buffer for PCIe for Gen 1 and Gen 2

2

Pin Configuration

Polarity Inversion Pin List Table

Power Groups

28-pin SSOP & TSSOP

01

8

OE_1

OE1#

15

PD#

PD

16

DIF_STOP#

DIF_STOP

21

OE_6

OE6#

Pins

OE_INV

VDD

GND

1

4

SRC_IN/SRC_IN#

5,11,18, 24

4

DIF(1,2,5,6)

N/A

27

IREF

28

27

Analog VDD & GND for PLL core

Description

Pin Number

VDDR 1

28 VDDA

SRC_IN 2

27 GNDA

SRC_IN# 3

26 IREF

GND 4

25 OE_INV

VDD 5

24 VDD

DIF_1 6

23 DIF_6

DIF_1# 7

22 DIF_6#

OE_1 8

21 OE_6

DIF_2 9

20 DIF_5

DIF_2# 10

19 DIF_5#

VDD 11

18 VDD

BYPASS#/PLL 12

17 HIGH_BW#

SCLK 13

16 DIF_STOP#

SDATA 14

15 PD#

OE_INV = 0

VDDR 1

28 VDDA

SRC_IN 2

27 GNDA

SRC_IN# 3

26 IREF

GND 4

25 OE_INV

VDD 5

24 VDD

DIF_1 6

23 DIF_6

DIF_1# 7

22 DIF_6#

OE1# 821 OE6#

DIF_2 9

20 DIF_5

DIF_2# 10

19 DIF_5#

VDD 11

18 VDD

BYPASS#/PLL 12

17 HIGH_BW#

SCLK 13

16 DIF_STOP

SDATA 14

15 PD

OE_INV = 1