 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
ST72361 数据表(PDF) 67 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST72361 数据表(HTML) 67 Page - STMicroelectronics |
|
|
67 / 224 page  ST72361 67/224 PWM AUTO-RELOAD TIMER (Cont’d) Figure 46. input Capture Timing Diagram, fCOUNTER = fCPU / 4 External Interrupt Capability This mode allows the Input capture capabilities to be used as external interrupt sources. The inter- rupts are generated on the edge of the ARTICx signal. The edge sensitivity of the external interrupts is programmable (CSx bit of ARTICCSR register) and they are independently enabled through CIEx bits of the ARTICCSR register. After fetching the interrupt vector, the CFx flags can be read to iden- tify the interrupt source. During HALT mode, the external interrupts can be used to wake up the micro (if the CIEx bit is set). In this case, the interrupt synchronization is done di- rectly on the ARTICx pin edge (Figure 47). Figure 47. ART External Interrupt in Halt Mode 04h COUNTER t fCOUNTER xxh 03h 04h ARTICx PIN CFx FLAG ICRx REGISTER INTERRUPT fCPU ICAP SAMPLED 05h 04h COUNTER t fCOUNTER xxh 03h 05h ARTICx PIN CFx FLAG ICRx REGISTER INTERRUPT fCPU ICAP SAMPLED 05h ARTICx PIN CFx FLAG t INTERRUPT |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
