INDUSTRIALTEMPERATURERANGE

IDT74LVC16373A

3.3VCMOS16-BIT TRANSPARENT D-TYPE LATCH

1

JULY 2015

INDUSTRIAL TEMPERATURE RANGE

IDT and the IDT logo is a registered trademark of Integrated Device Technology, Inc.

© 2015 Integrated Device Technology, Inc.

DSC-4624/6

FEATURES:

• Typical tSK(o) (Output Skew) < 250ps

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

•VCC = 3.3V ± 0.3V, Normal Range

•VCC = 2.7V to 3.6V, Extended Range

• CMOS power levels (0.4

μμμμμ W typ. static)

• All inputs, outputs, and I/O are 5V tolerant

• Supports hot insertion

• Available in SSOP and TSSOP packages

FUNCTIONAL BLOCK DIAGRAM

APPLICATIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

DRIVE FEATURES:

• High Output Drivers: ±24mA

• Reduced system switching noise

IDT74LVC16373A

DESCRIPTION:

The LVC16373A 16-bit transparent D-type latch is built using advanced

dual metal CMOS technology. This high-speed, low-power latch is ideal

for temporary storage of data. The LVC16373A can be used for implement-

ing memory address latches, I/O ports, and bus drivers. The Output Enable

and Latch Enable controls are organized to operate each device as two 8-

bit latches or one 16-bit latch. Flow-through organization of signal pins

simplifies layout. All inputs are designed with hysteresis for improved noise

margin.

All pins of the LVC16373A can be driven from either 3.3V or 5V devices.

This feature allows the use of this device as a translator in a mixed 3.3V/

5V supply system.

The LVC16373A has been designed with a ±24mA output driver. This

driver is capable of driving a moderate to heavy load while maintaining

speed performance.

1

OE

D

C

1

LE

1

D1

1

Q1

TO SEVEN OTHER CHANNELS

2

OE

D

C

2

LE

2

D1

2

Q1

1

48

47

24

25

36

2

13

Q

Q

TO SEVEN OTHER CHANNELS

3.3V CMOS 16-BIT

TRANSPARENT D-TYPE

LATCH WITH 3-STATE OUTPUTS

AND 5 VOLT TOLERANT I/O