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74LVC16373APVG8 数据表(PDF) 4 Page - Renesas Technology Corp

部件名 74LVC16373APVG8
功能描述  3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O
PDF  7 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

74LVC16373APVG8 数据表(HTML) 4 Page - Renesas Technology Corp

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INDUSTRIALTEMPERATURERANGE
4
IDT74LVC16373A
3.3VCMOS16-BIT TRANSPARENT D-TYPE LATCH
OPERATING CHARACTERISTICS, VCC = 3.3V ± 0.3V, TA = 25°C
Symbol
Parameter
Test Conditions
Typical
Unit
CPD
PowerDissipationCapacitanceperLatchOutputsenabled
CL = 0pF, f = 10Mhz
39
pF
CPD
PowerDissipationCapacitanceperLatchOutputsdisabled
6
SWITCHING CHARACTERISTICS(1)
VCC = 2.7V
VCC = 3.3V ± 0.3V
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
tPLH
PropagationDelay
4.9
1.6
4.2
ns
tPHL
xDx to xQx
tPLH
PropagationDelay
5.3
2.1
4.6
ns
tPHL
xLE to xQx
tPZH
OutputEnableTime
5.7
1.3
4.7
ns
tPZL
xOE to xQx
tPHZ
OutputDisableTime
6.3
2.5
5.9
ns
tPLZ
xOE to xQx
tSU
Set-up Time, data before LE
↓ HIGH or LOW
1.7
1.7
ns
tH
Hold Time, data after LE
↓ HIGH or LOW
1.2
1.2
ns
tW
Pulse Width LE HIGH
3.3
3.3
ns
tSK(o)
OutputSkew(2)
——
500
ps
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.



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