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74LVC16601APVG8 数据表(PDF) 4 Page - Renesas Technology Corp

部件名 74LVC16601APVG8
功能描述  3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS, 5 VOLT TOLERANT I/O
PDF  7 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

74LVC16601APVG8 数据表(HTML) 4 Page - Renesas Technology Corp

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INDUSTRIALTEMPERATURERANGE
4
IDT74LVC16601A
3.3VCMOS18-BIT UNIVERSAL BUS TRANSCEIVER
OPERATING CHARACTERISTICS, VCC = 3.3V ± 0.3V, TA = 25°C
Symbol
Parameter
Test Conditions
Typical
Unit
CPD
PowerDissipationCapacitanceperTransceiverOutputsenabled
CL = 0pF, f = 10Mhz
pF
CPD
PowerDissipationCapacitanceperTransceiverOutputsdisabled
SWITCHING CHARACTERISTICS(1)
VCC = 2.7V
VCC = 3.3V ± 0.3V
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
tPLH
PropagationDelay
—
5.4
—
4.6
ns
tPHL
Ax to Bx or Bx to Ax
tPLH
PropagationDelay
—
6.2
—
5.2
ns
tPHL
LEBA to Ax, LEAB to Bx
tPLH
PropagationDelay
—
6.3
—
5.3
ns
tPHL
CLKBA to Ax, CLKAB to Bx
tPZH
OutputEnableTime
—
6.8
—
5.6
ns
tPZL
OEBA to Ax, OEAB to Bx
tPHZ
OutputDisableTime
—
6
—
5.2
ns
tPLZ
OEBA to Ax, OEAB to Bx
tSU
Set-up Time HIGH or LOW, Ax to CLKAB, Bx to CLKBA
1.5
—
1.5
—
ns
tH
Hold Time HIGH or LOW, Ax to CLKAB, Bx to CLKBA
0.8
—
0.8
—
ns
tSU
Set-up Time HIGH or LOW
Clock LOW
1
—
1
—
ns
Ax to LEAB, Bx to LEBA
Clock HIGH
1
—
1
—
tSU
Set-up Time, CLKENAB to CLKAB
2.1
—
2.1
—
ns
tSU
Set-up Time, CLKENBA to CLKBA
2.1
—
2.1
—
ns
tH
Hold Time HIGH or LOW, Ax after LEAB, Bx after LEBA
1.8
—
1.8
—
ns
tH
Hold Time, CLKENAB after CLKAB
0.5
—
0.5
—
ns
tH
Hold Time, CLKENBA after CLKBA
0.5
—
0.5
—
ns
tW
LEAB or LEBA Pulse Width HIGH
3
—
3
—
ns
tW
CLKAB or CLKBA Pulse Width HIGH or LOW
3
—
3
—
ns
tSK(o)
OutputSkew(2)
——
—
500
ps
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.



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