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AD6654/PCB 数据表(PDF) 84 Page - Analog Devices |
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AD6654/PCB 数据表(HTML) 84 Page - Analog Devices |
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84 / 88 page ![]() AD6654 Rev. 0 | Page 84 of 88 AGC0, I Output <15:0> This read-only register provides the latest in-phase output sample from AGC0. Note that AGC0 might be bypassed, and that AGC0 here is representative of the datapath only. AGC0, Q Output <15:0> This read-only register provides the latest quadrature-phase output sample from AGC0. Note that AGC0 might be bypassed, and that AGC0 here is representative of the datapath only. AGC1, I Output <15:0> This read-only register provides the latest in-phase output sample from AGC1. Note that AGC1 might be bypassed and that AGC1 here is representative of the datapath only. AGC1, Q Output <15:0> This read-only register provides the latest quadrature-phase output sample from AGC1. Note that AGC1 might be bypassed and that AGC1 here is representative of the datapath only. AGC2, I Output <15:0: This read-only register provides the latest in-phase output sample from AGC2. Note that AGC2 might be bypassed and that AGC2 here is representative of the datapath only. AGC2, Q Output <15:0> This read-only register provides the latest quadrature-phase output sample from AGC2. Note that AGC2 might be bypassed and that AGC2 here is representative of the datapath only. AGC3, I Output <15:0> This read-only register provides the latest in-phase output sample from AGC3. Note that AGC3 might be bypassed and that AGC3 here is representative of the datapath only. AGC3, Q Output <15:0> This read-only register provides the latest quadrature-phase output sample from AGC3. Note that AGC3 might be bypassed and that AGC3 here is representative of the datapath only. AGC4, I Output <15:0> This read-only register provides the latest in-phase output sample from AGC4. Note that AGC4 might be bypassed and that AGC4 here is representative of the datapath only. AGC4, Q Output <15:0> This read-only register provides the latest quadrature-phase output sample from AGC4. Note that AGC4 might be bypassed and that AGC4 here is representative of the datapath only. AGC5, I Output <15:0> This read-only register provides the latest in-phase output sample from AGC5. Note that AGC5 might be bypassed and that AGC5 here is representative of the datapath only. AGC5, Q Output <15:0> This read-only register provides the latest quadrature-phase output sample from AGC5. Note that AGC5 might be bypassed and that AGC5 here is representative of the datapath only. AGC0, RSSI Output <11:0> This read-only register provides the latest RSSI output sample from AGC0. This register is updated only when AGC0 is enabled and operating. AGC1, RSSI Output <11:0> This read-only register provides the latest RSSI output sample from AGC1. This register is updated only when AGC1is enabled and operating. AGC2, RSSI Output <11:0> This read-only register provides the latest RSSI output sample from AGC2. This register is updated only when AGC2 is enabled and operating. AGC3, RSSI Output <11:0> This read-only register provides the latest RSSI output sample from AGC3. This register is updated only when AGC3 is enabled and operating. AGC4, RSSI Output <11:0> This read-only register provides the latest RSSI output sample from AGC4. This register is updated only when AGC4 is enabled and operating. AGC5, RSSI Output <11:0> This read-only register provides the latest RSSI output sample from AGC5. This register is updated only when AGC5 is enabled and operating. |
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