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ICS1894-32 数据表(PDF) 39 Page - Renesas Technology Corp

部件名 ICS1894-32
功能描述  10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PDF  51 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

ICS1894-32 数据表(HTML) 39 Page - Renesas Technology Corp

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ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
39
ICS1894-32
REV M 021512
10M Media Independent Interface: Transmit Latency
The table below lists the significant time periods for the 10M MII transmit latency. The time periods consist of
timings of signals on the following pins:
• TXEN
• TXCLK
• TXD (that is, TXD[3:0])
• TP_TX (that is, TP_TXP and TP_TXN)
The 10M MII Transmit Latency Timing Diagram shows the timing diagram for the time periods.
10M MII Transmit Latency Timing Diagram
Time
Period
Parameter
Conditions
Min. Typ. Max.
Units
t1
TXD Sampled to MDI Output of First Bit
10M MII
–
1.2
2
Bit times
TXCLK
TXEN
TXD
† Manchester encoding is not shown.
55
5
t1
TP_TX†



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