5

AV9110

Output Divider Turth Tables

1

D

O

C0

D

O

C

X

/

K

L

C

e

d

i

v

i

D

t

u

p

t

u

O

)

X

(

00

1

01

2

10

4

11

8

Table 2

1

D

O

C0

D

O

C

O

C

V

e

d

i

v

i

D

t

u

p

t

u

O

)

R

(

00

1

01

2

10

4

11

8

Table 3

Programming the PLL

The AV9110 has a wide operating range but it is recommended that it is operated within the following limits:

The AV9110 is a classical PLL circuit and the VCO output frequency is given by:

fVCO =

N•V• fREF

M

Where N = VCO divided, 3 to 127

M =m Reference divide, 3 to 127

V = Perscale, 1 or 8

The 2 output drivers then give the following frequencies:

fCLK =

fVCO

R

= N•V• fREF

M•R

or fREF (output mixable by bit 17)

fCLK/X =

=

fVCLK

X

Where R, X = output dividers 1, 2, 4 or 8

fVCO

R•X

Notes:

1. Output frequency accuracy will depend solely on input reference frequency accuracy.

2. For output frequencies below 125 MHz, it is recommended that the VCO output divide, R, should be 2 or greater. This will

give improved duty cycle.

3. The minimum output frequency step size is approximately 0.2% due to the divider range provided.

f

<

z

H

M

2

F

E

R

z

H

M

2

3

<f

F

E

R

y

c

n

e

u

q

e

r

f

e

c

n

e

r

e

f

e

r

t

u

p

n

I

=

z

H

M

5

<

<

z

H

k

0

0

27

2

1

o

t

3

,

e

d

i

v

i

d

e

c

n

e

r

e

f

e

R

=

M

f

<

z

H

M

0

5

O

C

V

z

H

M

0

5

2

<f

O

C

V

y

c

n

e

u

q

e

r

f

t

u

p

t

u

o

O

C

V

=

f

O

C

V

z

H

M

0

5

2

<f

K

L

C

y

c

n

e

u

q

e

r

f

t

u

p

t

u

o

X

/

K

L

C

r

o

K

L

C

=

fREF

M