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STR750F 数据表(PDF) 59 Page - STMicroelectronics |
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STR750F 数据表(HTML) 59 Page - STMicroelectronics |
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59 / 73 page ![]() STR750F Electrical parameters 59/71 3.3.9 TB and TIM timer characteristics Subject to general operating conditions for VDD_IO, fCK_SYS, and TA unless otherwise specified. Refer to Section 3.3.8: I/O port pin characteristics on page 53 for more details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output...). Table 35. TB and TIM timers Symbol Parameter Conditions Min Typ Max Unit tw(ICAP)in Input capture pulse time TIM0,1,2 2 tCK_TIM tres(TIM) Timer resolution time(1) 1. Take into account the frequency limitation due to the I/O speed capability when outputting the PWM to I/O pin, described in : Output speed on page 56. TB fCK_TIM(MAX) = fCK_SYS 1tCK_TIM fCK_TIM = fCK_SYS = 60 MHz 16.6(1) ns TIM0,1,2 fCK_TIM(MAX) = fCK_SYS 1tCK_TIM fCK_TIM = fCK_SYS = 60MHz 16.6(1) ns fEXT Timer external clock frequency on TI1 or TI2 TIM0,1,2 fCK_TIM(MAX) = fCK_SYS 0fCK_TIM/4 MHz fCK_TIM = fCK_SYS = 60 MHz 015 MHz ResTIM Timer resolution 16 bit tCOUNTER 16-bit Counter clock period when internal clock is selected (16-bit Prescaler) TB 1 65536 tCK_TIM fCK_TIM = fCK_SYS = 60 MHz 0.0166 1092 µs TIM0,1,2 1 65536 tCK_TIM fCK_TIM = fCK_SYS = 60 MHz 0.0166 1092 µs tMAX_COUNT Maximum Possible Count TB 65536x65536 tCK_TIM fCK_TIM = fCK_SYS = 60 MHz 71.58 s TIM0,1,2 65536x65536 tCK_TIM fCK_TIM = fCK_SYS = 60 MHz 71.58 s |
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