AN1280 - APPLICATION NOTE

5/8

Figure 8 : Decentralized Protection

Therefore, when a fault appears on the positive

rail, the definitive shutdown of the positive NMOS

will lead to the shutdown of the negative NMOS,

but when a fault appears on the negative rail, the

definitive shutdown of the negative NMOS will

have no effect on the positive NMOS.

Several possibilities are offered to reset the whole

system when it has been led to definitive shut-

down :

back (live insertion)

during a short time (100

µs typ or more) in

the case of remote control facilities

3. PERFORMANCES AND EVALUATION

All the curves shown in this application note have

been realized with the TD230 Evaluation Board.

The external conditions and components were as

listed hereafter :

CC

CC

µF (plastic)

µF (plastic)

The evaluation board is available and allows to

test the performances of the TD230. The layout

and schematic of this evaluation board are given

on figures 9A-9B-9C.

4. CAUTIONS

For proper use of the TD230 as a reliable protec-

tion device, a few precautions must be taken :

1. Proper bypass capacitors must be connected

as close as possible to the power pins of the

TD230 (PV

values are given in table (a).

2. The OSCGND pin must be tied to the GND pin

externally

(printed

board)

to ensure proper

step-up converter reference. If not, the step-up

converter will not start.

3. The INHIBIT pin is a CMOS/TTL compatible in-

put which should therefore not be left unconnect-

ed. The absolute maximum rating of this input is

7V. It should be tied to the TTL compatible output

of an eventual control block, or, if it should not be

used, tied to the GND pin.

TD230

TD230

TD230

TD230

BOARD1

BOARD2

BOARD3

BOARDN

Vcc+

P owe r S upply

GND

Vcc-