1

SY88823V

Micrel, Inc.

M9999-110905

hbwhelp@micrel.com or (408) 955-1690

DESCRIPTION

Multi-rate up to 3.2Gbps operation

Wide gain-bandwidth product

• 38dB differential gain

• 2GHz 3dB bandwidth

Low noise 50

• 60ps edge rates

Chatter-free, Signal-Detect (SD) output

• 4.6dB electrical hysteresis

• OC-TTL output with internal 4.75k

resistor

Programmable SD sensitivity using single external

resistor

Integrated input bias reference

TTL EN input allows feedback from SD

Wide operating range

• Single 3.3V

•–40

range

Available in tiny 10-pin EPAD-MSOP and 16-pin

MLF™ packages

FEATURES

3.3V/5V 3.2Gbps CML LOW-POWER

LIMITING POST AMPLIFIER w/TTL SD

SY88823V

APPLICATIONS

s 1.25Gbps and 2.5Gbps Gigabit Ethernet

s 1.062Gbps and 2.125Gbps Fibre Channel

s 155Mbps, 622Gbps, 1.25Gbps, and 2.5Gbps SONET/

SDH

s Gigabit interface converter (GBIC)

s Small form factor (SFF) and small form factor

pluggable (SFP) transceivers

s Parallel 10G Ethernet

s High-gain line driver and line receiver

Rev.: C

Amendment: /0

Issue Date:

November 2005

MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc.

The SY88823V low-power, limiting post amplifier is

designed for use in fiber optic receivers. The device connects

to typical transimpedance amplifiers (TIAs). The linear signal

output from TIAs can contain significant amounts of noise

and may vary in amplitude over time. The SY88823V

voltage-limited waveforms.

The SY88823V operates from a single +3.3V

±10% or

+5V

±10% power supply, over an industrial temperature

range of –40

°C to +85°C. With its wide bandwidth and high

gain, signals with data rates up to 3.2Gbps and as small as

or AC-coupled PECL inputs.

The SY88823V incorporates a signal detect (SD), open-

collector TTL output with internal 4.75k

Ω pull-up resistor. A

programmable, signal-detect level set pin (SDLVL) sets the

sensitivity of the input amplitude detection. SD asserts high

if the input amplitude rises above the threshold set by SDLVL

and de-asserts low otherwise. SD can be fed back to the

enable (EN) input to maintain output stability under a loss-

of-signal condition. EN de-asserts the true output signal

without removing the input signal. Typically 4.6dB SD

hysteresis is provided to prevent chattering.

Please see Micrel’s website at www.micrel.com for a

complete selection of optical module ICs.

The following table summarizes the differences between

devices in Micrel’s latest family of Limiting Amplifiers.

Integrated 50

Ω

LOS

Active LOW

Part Number

Input Termination

or SD

or HIGH Enable

SY88773V

No

LOS

LOW

SY88823V

No

SD

HIGH

SY88843V

Yes

SD

HIGH

SY88973V

Yes

LOS

LOW

Table 1. Limiting Amplifiers Selection Guide

TYPICAL PERFORMANCE

@3.2Gbps 2

TIME (50ps/div.)