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LTP8800-1AIPVPBF 数据表(PDF) 8 Page - Analog Devices |
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LTP8800-1AIPVPBF 数据表(HTML) 8 Page - Analog Devices |
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8 / 20 page ![]() LTP8800-1A 8 Rev. B For more information www.analog.com APPLICATIONS INFORMATION COMPENSATION The LTP8800-1A offers programmable loop compen- sation to optimize the transient response without any hardware change. A Type 3 filter architecture has been implemented. To tailor the loop response to the specific application, the low frequency gain, zero location, pole location and high frequency gain can all be set individually (see the Digital Filter Programming Registers section). From the sensed voltage to the duty cycle, the transfer function of the filter in z-domain is resolved by Equation 1. H(z) = D LFG • 1 (1 − z−1) + C HFG 1 − B 256 z−1 ⎛ ⎝⎜ ⎞ ⎠⎟ 1 − A 256 z−1 ⎛ ⎝⎜ ⎞ ⎠⎟ ⎛ ⎝ ⎜ ⎜ ⎜ ⎞ ⎠ ⎟ ⎟ ⎟ (1) Where: A = filter pole register value (in decimal), 0xFE03. B = filter zero register value (in decimal), 0xFE02. C = high frequency gain register value (in decimal), 0xFE04. D = low frequency gain register value (in decimal), 0xFE01. LFG = 9.5488 × 107/fSW. HFG = 5.968 × 106/fSW. As shown in Figure 1, adjusting low frequency gain reg- ister value will change the gain of the compensation over the low frequency range without moving the pole and zero locations. Adjusting high frequency gain register value will change the gain of the compensation over the high frequency range without moving the pole and zero loca- tions. As shown in Figure 2, adjusting the pole and zero register values will move the double poles and double zeroes of the compensation. Increasing the filter zero and pole register values will separate the double zeroes and double poles. It is recommended that LTpowerPlay® be used to program the filter. It is recommended that the user determines the appro- priate value for the compensation registers using the LTpowerCAD® tool. An example of the bode plot of the typical application circuit with the recommended compensation settings is shown in Figure 3. Measured bode plot of the LTP8800-1A in circuit Figure 10 with register setting (in decimal): 0xFE02 = 226, 0xFE03 = 160, 0xFE04 = 50, 0xFE01 = 8. (Crossover frequency: 28.84kHz, phase margin 64.5deg, gain margin 17.31dB). FREQUENCY (Hz) 10 100 1k 10k 100k 1M 5 10 15 20 25 30 35 40 45 50 55 88001a F01 LG INCREASE HG INCREASE Figure 1. Compensation Gain Adjustment FREQUENCY (Hz) 10 100 1k 10k 100k 1M 88001a F02 5 10 15 20 25 30 35 40 45 50 55 ZERO INCREASE POLE INCREASE Figure 2. Compensation Poles and Zeroes Adjustment Figure 3. Measured Bode Plot of the LTP8800-1A |
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