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FastEdge™ Series
CY2DP3120
Document #: 38-07514 Rev.*C
Page 9 of 9
Document History Page
Document Title: CY2DP3120 FastEdge™ Series 1:20 Differential Clock/Data Fanout Buffer
Document Number: 38-07514
REV.
ECN NO. Issue Date
Orig. of
Change
Description of Change
**
122438
12/05/02
RGL
New data sheet
*A
125457
04/17/03
RGL
Corrected typo Q14 to Q4 in pin 44 in the pin configuration diagram
Changed pin #s 1,14,27 and 40 from VCC to VCCO
Changed title to FastEdge™ Series 1:20 Differential Clock/Data Fanout
Buffer
*B
229391
See ECN
RGL
Supplied data to all TBD’s to match the device
*C
247606
See ECN
RGL/GGK Changed VOH and VOL to match the Char Data
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