AM29SL400D datasheet(21/41 Pages) SPANSION

21 / 41 page

April 13, 2005 Rev. A Amend. +1

Am29SL400D

ADV ANCE

I N FO RMAT I O N

If the output is low (Busy), the device is actively erasing

or programming. (This includes programming in the

Erase Suspend mode.) If the output is high (Ready),

the device is ready to read array data (including during

the Erase Suspend mode), or is in the standby mode.

Table 6 on page 21 shows the outputs for RY/BY#.

Figure 14, on page 27, Figure 17, on page 30 and

Figure 18, on page 31 shows RY/BY# for reset, pro-

gram, and erase operations, respectively.

DQ6: Toggle Bit I

Toggle Bit I on DQ6 indicates whether an Embedded

Program or Erase algorithm is in progress or complete,

or whether the device has entered the Erase Suspend

mode. Toggle Bit I may be read at any address, and is

valid after the rising edge of the final WE# pulse in the

command sequence (prior to the program or erase

operation), and during the sector erase time-out.

During an Embedded Program or Erase algorithm

operation, successive read cycles to any address

cause DQ6 to toggle (The system may use either OE#

or CE# to control the read cycles). When the operation

is complete, DQ6 stops toggling.

After an erase command sequence is written, if all

sectors selected for erasing are protected, DQ6 toggles

for approximately 100 µs, then returns to reading array

data. If not all selected sectors are protected, the

Embedded Erase algorithm erases the unprotected

sectors, and ignores the selected sectors that are pro-

tected.

The system can use DQ6 and DQ2 together to deter-

mine whether a sector is actively erasing or is

erase-suspended. When the device is actively erasing

(that is, the Embedded Erase algorithm is in progress),

DQ6 toggles. When the device enters the Erase

Suspend mode, DQ6 stops toggling. However, the

system must also use DQ2 to determine which sectors

are erasing or erase-suspended. Alternatively, the

system can use DQ7 (see the subsection on DQ7:

Data# Polling).

If a program address falls within a protected sector,

DQ6 toggles for approximately 1 µs after the program

command sequence is written, then returns to reading

array data.

DQ6 also toggles during the erase-suspend-program

mode, a nd stops toggling once the Embedde d

Program algorithm is complete.

Table 6 on page 21 shows the outputs for Toggle Bit I

on DQ6. Figure 6, on page 20 shows the toggle bit

algorithm. Figure 20, on page 32 shows the toggle bit

timing diagrams. Figure 21, on page 33 shows the dif-

ferences between DQ2 and DQ6 in graphical form. See

also the subsection on DQ2: Toggle Bit II.

DQ2: Toggle Bit II

The “Toggle Bit II” on DQ2, when used with DQ6, indi-

cates whether a particular sector is actively erasing

(that is, the Embedded Erase algorithm is in progress),

or whether that sector is erase-suspended. Toggle Bit

II is valid after the rising edge of the final WE# pulse in

the command sequence. The device toggles DQ2 with

each OE# or CE# read cycle.

DQ2 toggles when the system reads at addresses

within those sectors that have been selected for era-

sure. But DQ2 cannot distinguish whether the sector is

actively erasing or is erase-suspended. DQ6, by com-

parison, indicates whether the device is actively

erasing, or is in Erase Suspend, but cannot distinguish

which sectors are selected for erasure. Thus, both

status bits are required for sector and mode informa-

tion. Refer to Table 6 on page 21 to compare outputs

for DQ2 and DQ6.

Figure 6, on page 20 shows the toggle bit algorithm in

flowchart form, and the section “DQ2: Toggle Bit II”

explains the algorithm. See also the DQ6: Toggle Bit I

subsection. Figure 20, on page 32 shows the toggle bit

timing diagram. Figure 21, on page 33 shows the dif-

ferences between DQ2 and DQ6 in graphical form.

Reading Toggle Bits DQ6/DQ2

Refer to Figure 6, on page 20 for the following discus-

sion. Whenever the system initially begins reading

toggle bit status, it must read DQ7–DQ0 at least twice

in a row to determine whether a toggle bit is toggling.

Typically, the system would note and store the value of

the toggle bit after the first read. After the second read,

the system would compare the new value of the toggle

bit with the first. If the toggle bit is not toggling, the

device has completed the program or erase operation.

The system can read array data on DQ7–DQ0 on the

following read cycle.

However, if after the initial two read cycles, the system

determines that the toggle bit is still toggling, the

system also should note whether the value of DQ5 is

high (see the section on DQ5). If it is, the system

should then determine again whether the toggle bit is

toggling, since the toggle bit may have stopped tog-

gling just as DQ5 went high. If the toggle bit is no longer

toggling, the device has successfully completed the

program or erase operation. If it is still toggling, the

device did not completed the operation successfully,

and the system must write the reset command to return

to reading array data.

The remaining scenario is that the system initially

determines that the toggle bit is toggling and DQ5 has

not gone high. The system may continue to monitor the

toggle bit and DQ5 through successive read cycles,

determining the status as described in the previous

paragraph. Alternatively, it may choose to perform

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